PLL Feedback Monitoring Using Predicted State Variable Comparison

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Solution Overview

Problem

Modern CMOS ICs face high failure rates due to latent defects and environmental disturbances, which can lead to safety-critical failures in safety-critical applications like automotive systems, necessitating rapid and reliable fault detection in phase lock loops (PLLs) to meet stringent reliability requirements.

Innovation Solution

A method and system for monitoring phase lock loops using a feedback circuit with a phase detector, loop filter, and digitally controlled oscillator, where state variables are predicted and compared to actual values to determine errors within a defined margin, with a counter mechanism to detect fault conditions, allowing for rapid identification of faults without disrupting system operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If regular self-tests are implemented to detect faults rapidly, then detection time is reduced, but system complexity increases

Engineering Contradiction:
Improvedetection timeVSAvoidsystem complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent implements a feedback mechanism where the monitoring unit continuously compares actual state variables of the PLL against predicted values generated by a model. This feedback loop enables rapid fault detection by immediately identifying deviations between expected and actual behavior, reducing detection time while maintaining manageable system complexity through intelligent monitoring rather than exhaustive testing.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent employs a predictive model that calculates expected state variables in advance based on known system behavior and input signals. By having predicted values ready for comparison against actual measurements, the system can rapidly detect faults without requiring complex real-time analysis or extensive test sequences, thus reducing detection time while keeping the monitoring mechanism relatively simple.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If monitoring is implemented without interrupting system operation, then system availability is maintained, but measurement precision may be reduced

Engineering Contradiction:
Improvesystem availabilityVSAvoidfault detection accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent introduces a monitoring unit as an intermediary component that observes PLL state variables without disrupting the normal operation of the phase detector, loop filter, or oscillator. This intermediary monitoring mechanism enables continuous fault detection while maintaining system availability, as the monitoring occurs in parallel with normal PLL functionality rather than requiring system interruption.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces traditional fault detection methods that might require system interruption with a computational approach using state variable modeling and comparison. Instead of mechanical or intrusive testing methods, the system uses mathematical models and digital comparison logic to detect faults, thereby maintaining measurement precision while ensuring continuous system operation and availability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentEP4012421B1System and method for monitoring feedback circuits
Publication Date: 2024.08.21 NXP BV
  • EP4012421B1 patent drawingFigure 1~2
  • EP4012421B1 patent drawingFigure 3~4
  • EP4012421B1 patent drawingFigure 5~6

AI summary

The disclosure relates to monitoring of feedback systems such as phase lock loops. A system is disclosed, comprising: a feedback circuit (100); and a monitoring module (190). The monitoring module (190) is configured to: i) receive actual values of at least one state variable describing the state of the feedback circuit at a first time; ii) determine a predicted future value of the at least one state variable at a second time from the actual values at the first time using a model of the feedback circuit; iii) receive actual values of the at least one state variable at the second time; iv) compare the predicted future value of the at least one state variable at the second time with the actual value of the at least one state variable at the second time; and v) determine whether the feedback circuit has a fault condition, depending on the results of step iv).