PLL Filter Capacitive Voltage Divider for Phase Noise
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Solution Overview
Problem
Designing phase-locked loops (PLLs) with good noise performance is challenging due to the high VCO gain and limited voltage range, especially in automotive Radar systems where the VCO operates at a much higher frequency than the charge pump, requiring an effective integration of charge pump, loop filter, and VCO components.
Innovation Solution
Incorporating a capacitive voltage divider in the loop filter to reduce the control voltage from the charge pump's voltage domain to the VCO's domain, allowing for improved noise performance and integration on the same semiconductor die, while maintaining different voltage domains for the charge pump and VCO.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If impedance scaling is used to reduce phase noise contributed by the loop filter, then phase noise performance is improved, but capacitance area becomes excessive
Solution Approach 1:
The patent introduces a voltage divider circuit as an intermediary component between the charge pump and the VCO. This voltage divider scales down the control voltage from the charge pump's voltage domain to the VCO's voltage domain, allowing the loop filter to operate at higher voltages for reduced phase noise while the VCO operates at lower voltages for high-frequency operation, thus avoiding excessive capacitance area
Solution Approach 2:
The patent changes the voltage domain parameter by introducing different voltage domains for the charge pump and VCO. The charge pump operates at a higher voltage domain (e.g., 1.8V or higher) to reduce phase noise, while the VCO operates at a lower voltage domain (e.g., 0.9V or lower) to support high switching frequencies. The voltage divider transforms the voltage parameter to enable this separation
2Ease of manufacture
If BiCMOS technology is used to integrate charge pump, loop filter and VCO on the same die, then integration is achieved, but supply voltage increases and VCO gain is reduced
Solution Approach 1:
The patent segments the PLL circuit into two distinct voltage domains: a high-voltage domain for the charge pump and loop filter, and a low-voltage domain for the VCO. This segmentation allows each component to operate at its optimal voltage level while being integrated on the same die, maintaining high VCO gain through low-voltage operation
3Reliability
If charge pump operates at higher voltage to reduce noise sensitivity, then noise performance is improved, but voltage domain mismatch with VCO occurs
Solution Approach 1:
The voltage divider acts as an intermediary that bridges the voltage domain mismatch between the charge pump (operating at higher voltage for reduced noise sensitivity) and the VCO (operating at lower voltage for high-frequency operation). It transforms the control voltage from the high-voltage domain to the low-voltage domain without requiring changes to the component designs
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces phase noise contributed by the loop filter without excessive capacitance, enabling better noise performance and compatibility with low voltage CMOS technologies, suitable for automotive Radar applications.
Implementation Method 1
the loop filter comprises a capacitive voltage divider configured to reduce the control voltage from a range that falls within a voltage domain of the charge pump to a range that falls within a voltage domain of the VCO
Data Source
AI summary
A phase-locked loop (PLL) includes a detector configured to generate an error signal based on a difference between a reference signal and an output signal, a charge pump configured to generate current pulses based on the error signal, a loop filter configured to generate a control voltage based on the current pulses, and a voltage-controlled oscillator (VCO) configured to generate the output signal at a frequency which is a function of the control voltage. The loop filter includes a capacitive voltage divider configured to reduce the control voltage from a range that falls within a voltage domain of the charge pump to a range that falls within a voltage domain of the VCO, the voltage domain of the charge pump being greater than the voltage domain of the VCO.