DC-Coupled PLL FM Discriminator With DC Drift Compensation

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Solution Overview

Problem

Phase-locked loop (PLL) circuits face instability due to manufacturing parameter variations and DC voltage drifting over time and temperature, making it challenging to design a single loop filter for all manufacturing processes and affecting the circuit's usefulness.

Innovation Solution

A DC voltage drift detection and reduction circuit is integrated into the PLL, which compares the frequency of the oscillating signal to detect and compensate for DC drift by adjusting the voltage-controlled oscillator, thereby reducing output drift.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single loop filter design is used across all manufacturing processes, then manufacturing complexity is reduced, but manufacturing precision deteriorates due to process variations

Engineering Contradiction:
Improveloop filter design complexityVSAvoidfeedback loop stability
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by making the loop filter characteristics adjustable through digital control. The loop filter includes programmable gain amplifiers and adjustable RC time constants that can be modified via digital signals from a microprocessor, allowing the same physical circuit to be optimized for different manufacturing processes and conditions.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements dynamics by transitioning from a static loop filter design to a dynamic one where filter parameters can change over time. The system can adjust loop filter characteristics during operation based on detected drift conditions, temperature changes, or manufacturing variations, enabling adaptive optimization without requiring multiple fixed designs.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If DC drift compensation is not implemented, then device complexity is reduced, but reliability deteriorates due to DC voltage drifting over time and temperature

Engineering Contradiction:
Improvecircuit structureVSAvoidDC voltage stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements feedback by continuously monitoring the DC voltage level at the integrator output and using this information to adjust the loop filter characteristics. A microprocessor detects the DC drift and sends control signals to modify the loop filter gain and time constants, creating a closed-loop system that actively compensates for drift and maintains reliability.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10277231B1DC coupled phase locked loop FM discriminator
Publication Date: 2019.04.30 EMHISER RES
  • US10277231B1 patent drawing
  • US10277231B1 patent drawing
  • US10277231B1 patent drawing

AI summary

An electronic assembly having a phase locked discriminator circuit that includes a phase locked loop (PLL), a voltage controlled oscillator (VCO), a signal output integrator, and a direct current (DC) drift reducing circuit. The PLL has an input to receive an oscillating signal. The signal output integrator, the PLL and the VCO are all electrically coupled together. The DC drift reducing circuit is electrically coupled to the PLL, the signal output integrator and the VCO. The DC drift reducing circuit detects a DC drift of an output of the signal output integrator by comparing a frequency of the oscillating signal to the DC drift.