Frequency Detector Using Phase-Locked Loop for Low Power Accuracy
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Solution Overview
Problem
Conventional frequency detectors require longer count times or higher count frequencies to increase accuracy, leading to increased power consumption when detecting frequency differences in circuits.
Innovation Solution
A frequency detector system that includes an alternating current coupled capacitor, a rectifying circuit, an analog-to-digital converter or a time-to-digital converter, and a control unit, which calculates frequency differences by converting the signal into voltage differences, allowing for increased accuracy without the need for longer count times or higher count frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the count time is increased to improve measurement precision, then the accuracy of detected frequency differences is improved, but the power consumption is increased
Solution Approach 1:
The patent replaces the conventional counter-based frequency detection method with a phase-locked loop (PLL) based detection method. The PLL circuit locks onto the frequency of the signal to be tested and generates a feedback signal, allowing frequency difference detection without requiring long counting periods. This substitution of the detection mechanism enables accurate frequency difference measurement while maintaining low power consumption, as the PLL operates continuously at a fixed frequency rather than requiring extended measurement intervals.
2Measurement precision
If the count frequency is increased to improve measurement precision, then the accuracy of detected frequency differences is improved, but the power consumption is increased
Solution Approach 1:
The patent replaces the counter-based method with a phase-locked loop (PLL) based detection method. The PLL circuit locks onto the frequency of the signal to be tested and generates a feedback signal, allowing frequency difference detection without requiring high count frequencies. This substitution of the detection mechanism enables accurate frequency difference measurement while maintaining low power consumption, as the PLL operates continuously at a fixed frequency rather than requiring high-speed counting operations.
Solution Approach 2:
The patent changes the detection parameter from count frequency to phase difference. Instead of measuring frequency by counting cycles over a period or using high-frequency counting, the PLL method measures the phase difference between the reference signal and the signal to be tested. This parameter change allows accurate frequency difference detection without increasing power consumption, as phase detection can be performed continuously at low power levels.
3Measurement precision
If the count time is increased to improve measurement precision, then the accuracy of detected frequency differences is improved, but the productivity is decreased
Solution Approach 1:
The patent replaces the counter-based frequency detection method with a phase-locked loop (PLL) based detection method. The PLL circuit locks onto the frequency of the signal to be tested and generates a feedback signal, allowing frequency difference detection without requiring long counting periods. This substitution of the detection mechanism enables accurate frequency difference measurement while maintaining fast detection speed, as the PLL can lock and provide accurate measurements continuously without waiting for extended measurement intervals.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system achieves higher accuracy in detecting frequency differences without increasing count time or count frequency, thereby reducing power consumption.
Implementation Method 1
an alternating current coupled capacitor configured to receive the signal to be tested
Implementation Method 2
a rectifying circuit electrically connected to the alternating current coupled capacitor
Data Source
AI summary
A frequency detector is used for detecting a frequency difference of a signal to be tested from a first time point to a second time point. The frequency detector includes: an alternating current coupled capacitor configured to receive the signal to be tested; a rectifying circuit electrically connected to the alternating current coupled capacitor; an analog-to-digital converter electrically connected to the rectifying circuit; a control unit electrically connected to the analog-to-digital converter; and a counter electrically connected to the rectifying circuit and the control unit, wherein the control unit is configured to calculate the frequency difference of the signal to be tested from the first time point to the second time point according to outputs of the analog-to-digital converter and outputs of the counter.