Phase-Locked Loop Calibration for Faster Frequency Locking

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Solution Overview

Problem

Existing phase locked loops face challenges in quickly locking to a target frequency, which affects the operational speed and efficiency of electronic devices.

Innovation Solution

A phase locked loop configuration including a phase detector, charge pump, loop filter, voltage-to-current converter, digital-to-analog converter, oscillator, divider, and automatic frequency calibrator, along with a reset circuit, which enables faster frequency locking by compensating for variations and adjusting the division ratio and frequency of the output signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a conventional phase locked loop is used, then the circuit structure is simple, but the locking speed is slow

Engineering Contradiction:
Improvelocking speedVSAvoidcircuit complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The phase locked loop is divided into multiple functional modules: phase detector module, charge pump module, loop filter module, voltage-to-current converter module, digital-to-analog converter module, oscillator module, divider module, and automatic frequency calibrator module. Each module performs a specific function, allowing for optimized signal processing at each stage to improve locking speed without overwhelming complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The automatic frequency calibrator performs preliminary frequency calibration by comparing the compensation frequency signal with the reference frequency signal and adjusting the voltage-to-current converter before the main locking process. This preliminary action reduces frequency offsets early in the operation, significantly improving the overall locking speed.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If the locking speed is increased, then the operational speed of electronic devices improves, but the frequency stabilization time may be insufficient

Engineering Contradiction:
Improveoperational speedVSAvoidfrequency stabilization
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The phase detector continuously compares the phase of the reference frequency signal with the division frequency signal, and the automatic frequency calibrator continuously monitors the frequency difference between the compensation frequency signal and reference frequency signal. This continuous feedback mechanism ensures that frequency stabilization is maintained while achieving fast locking, as the system can make real-time adjustments to correct any deviations.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The automatic frequency calibrator autonomously performs frequency calibration by detecting the frequency difference and automatically adjusting the voltage-to-current converter without external intervention. This self-service capability ensures reliable frequency stabilization while maintaining fast operational response, as the system self-corrects frequency errors during operation.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11601131B2Phase locked loop and operating method of phase locked loop
Publication Date: 2023.03.07 SAMSUNG ELECTRONICS CO LTD
  • US11601131B2 patent drawing
  • US11601131B2 patent drawing
  • US11601131B2 patent drawing

AI summary

A phase locked loop includes a phase detector outputting a first signal corresponding to a phase difference of a reference frequency signal and a division frequency signal, a charge pump amplifying a first signal to output a second signal, a loop filter filtering the second signal to output a third signal, a voltage-to-current converter receiving the third signal and outputting a fourth signal, a digital-to-analog converter outputting a fifth signal based on the fourth signal and a digital compensation signal, an oscillator outputting an output frequency signal having a frequency corresponding to the fifth signal, a divider dividing the frequency of the output frequency signal to output the division frequency signal and a compensation frequency signal, and an automatic frequency calibrator compensating for the voltage-to-current converter based on a difference between a frequency of the compensation frequency signal and a frequency of a reference frequency signal.