Two-Point PLL Gain Calibration Using Dual-Path VCO Modulation
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Solution Overview
Problem
Existing two-point modulation Phase-Locked Loops (PLLs) face challenges in gain calibration, requiring large and power-consuming calibration units, and often rely on expensive high-precision DACs and analog comparators, which increase chip area and power consumption, while also being susceptible to process, voltage, and temperature variations.
Innovation Solution
An open-loop calibration system using an overflow counter and an offset DAC with two gain values (KLOOP and KMOD) is implemented, allowing for all-digital calibration without precision analog comparators, reducing power and area requirements, and breaking the trade-off between linearity and tuning range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a two-point modulation PLL is used to eliminate DAC and mixer, then chip area and power are reduced, but gain calibration becomes more difficult and requires complex calibration units
Solution Approach 1:
The patent replaces complex analog calibration circuits with a digital calibration approach. Specifically, it uses a digital counter to measure the output frequency of the VCO and calculates the gain calibration value through digital computation, eliminating the need for complex analog comparators and precision DACs while reducing calibration unit complexity
Solution Approach 2:
The patent creates a simplified model of the calibration process by measuring the VCO output frequency over a fixed period using a counter, then copying this measurement data to calculate the calibration value. This approach avoids the need for complex real-time analog calibration circuits while achieving the same calibration objective
2Measurement precision
If high-precision DACs and analog comparators are used for calibration, then measurement precision is improved, but chip area and power consumption increase
Solution Approach 1:
The patent replaces expensive, power-consuming high-precision DACs and analog comparators with simple, low-power digital components. Specifically, it uses a standard counter and digital logic to perform gain calibration, achieving sufficient precision without the need for costly analog circuitry that consumes significant power
Solution Approach 2:
The patent substitutes analog measurement circuits with digital measurement and computation. By using a digital counter to measure VCO frequency and performing calibration calculations in the digital domain, the system achieves the required measurement precision while dramatically reducing power consumption compared to analog approaches
3Adaptability or versatility
If VCO gain is increased to operate over wide frequency range, then frequency tuning range is improved, but linearity deteriorates and phase noise increases
Solution Approach 1:
The patent implements dynamic gain calibration that adapts to different operating conditions. By continuously measuring the VCO output frequency and calculating the appropriate gain calibration value based on actual performance, the system maintains optimal linearity across the entire frequency tuning range rather than being fixed at a single operating point
Solution Approach 2:
The patent establishes a feedback loop where the VCO output frequency is measured by a counter, the measured value is used to calculate the gain calibration value, and this calibration value is applied back to the VCO. This closed-loop feedback mechanism continuously optimizes linearity while maintaining wide frequency tuning capability
Data Source
AI summary
A two-point modulation Phase-Locked Loop (PLL) has a dual-input Voltage-Controlled Oscillator (VCO). A digital data modulation signal is combined with a carrier and input to a feedback divider. The data modulation signal is also input to an offset Digital-to-Analog Converter (DAC) to generate an analog voltage to a second input of the VCO. The loop path through the VCO has a higher gain than the DAC path through the VCO, which has better linearity. A calibration unit divides the VCO output and counts pulses. The offset DAC has a data input and a gain input. During calibration, the data input of the DAC is set to minimum and then maximum values and VCO output pulses counted, and repeated for two values of the gain input to the DAC. From the four counts a K(DAC) calculator calculates the calibrated gain to apply to the gain input of the offset DAC.