Two-Point PLL Gain Calibration for Wideband Modulation Matching

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Solution Overview

Problem

Phase locked loops face performance issues due to frequency variations mismatches in two-point modulation paths, affecting the modulation of data signals with wide bandwidths.

Innovation Solution

A phase locked loop configuration that generates a gain based on the differential value of a phase error signal to adjust frequency variations in one modulation path to match those in another, ensuring accurate two-point modulation operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If two-point modulation technique is used to modulate data signal with wide bandwidth, then the bandwidth capability is improved, but frequency variations mismatch between modulation paths occurs which negatively affects performance

Engineering Contradiction:
Improvebandwidth capabilityVSAvoidmodulation performance
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the phase error signal from one modulation path is differentiated and used to generate a gain adjustment signal. This feedback loop continuously monitors and corrects frequency variations in the other modulation path, ensuring that both paths remain synchronized despite bandwidth expansion challenges.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically changes the gain parameter of the modulation path based on the differentiated phase error signal. By adjusting the gain in real-time according to the detected frequency variations, the system maintains consistent modulation performance across wide bandwidths while adapting to changing conditions.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If gain adjustment is performed to match frequency variations between modulation paths, then modulation accuracy is improved, but system complexity increases due to additional gain calibration circuitry

Engineering Contradiction:
Improvemodulation accuracyVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines the gain calibration function with the existing phase error detection circuitry. By merging the differentiation of the phase error signal with the gain adjustment mechanism, the system achieves accurate frequency matching without adding completely separate calibration subsystems, thus reducing overall complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system performs self-calibration by using its own phase error signal to generate the necessary gain adjustment. The differentiation of the phase error signal automatically provides the correction information needed, eliminating the need for external calibration equipment or complex manual adjustment mechanisms.

Inventive Principle:
Principle #25Self-service

3Productivity

If differential value of phase error signal is used to generate gain quickly, then calibration speed is improved, but noise sensitivity increases due to differentiation operation

Engineering Contradiction:
Improvecalibration speedVSAvoidnoise sensitivity
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent employs a dynamic approach where the gain adjustment is continuously updated based on the real-time differentiated phase error signal. This dynamic adaptation allows the system to quickly respond to frequency variations while the continuous nature of the feedback helps average out noise effects, maintaining both speed and stability.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11356106B2Phase locked loop and electronic device including the same
Publication Date: 2022.06.07 SAMSUNG ELECTRONICS CO LTD
  • US11356106B2 patent drawing
  • US11356106B2 patent drawing
  • US11356106B2 patent drawing

AI summary

An electronic device includes a phase locked loop configured to perform a two-point modulation operation on a data signal by using first and second modulation paths, and the phase locked loop is configured to generate, based on a differential value of a first phase error signal generated in the first modulation path, a gain for adjusting a frequency variation of the data signal through the second modulation path so as to match with the frequency variation of the data signal through the first modulation path.