PLL Gain Transition Control for Fast Lock and Low-Noise Operation
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Solution Overview
Problem
Existing phase-locked loop (PLL) devices with bang-bang non-linear phase detectors face challenges in quickly transitioning to and maintaining the random noise operation mode, which is crucial for stability and noise reduction, and lack efficient mechanisms to recover from lock state loss.
Innovation Solution
A PLL device with a bang-bang non-linear phase comparator, a proportional-integral loop filter, and a voltage-controlled oscillator, equipped with a loop controller that dynamically adjusts proportional and integral coefficients based on lock state conditions and oscillation duration thresholds to facilitate rapid lock acquisition and transition to random noise operation mode, while ensuring stability and quick recovery from lock loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the open-loop gain of the PLL device is reduced to obtain operation stability and low noise, then the random noise operation mode is achieved, but the transition to this mode takes too long and lock acquisition time increases
Solution Approach 1:
The patent applies dynamics by making the open-loop gain adjustable and time-variable. The gain is dynamically changed from a higher initial value during lock acquisition to a lower final value for stable random noise operation. This temporal variation in gain allows the system to optimize performance at different stages: faster acquisition initially, then stable low-noise operation afterward.
Solution Approach 2:
The patent changes the parameter of open-loop gain over time. By transitioning the gain from a higher value to a lower value, the system achieves both rapid lock acquisition (with higher gain) and stable random noise operation (with lower gain). This parameter transformation resolves the contradiction between speed and stability.
2Object-generated harmful factors
If the open-loop gain is continuously decreased to reduce phase oscillation magnitude, then noise capture within the loop-control occurs, but the transition to random noise operation mode is delayed
Solution Approach 1:
The patent applies preliminary action by performing the gain reduction in a controlled, staged manner rather than continuously. The gain is decreased from an initial higher value to a final lower value through managed transitions, allowing the system to prepare for and enter the random noise operation mode more quickly while still achieving low phase noise.
Solution Approach 2:
The dynamic adjustment of open-loop gain allows the system to rapidly transition through the intermediate states needed to reach random noise operation mode. By making the gain time-variable, the system can quickly reduce phase oscillation magnitude and enter the desired operation mode without excessive delay.
3Reliability
If the PLL device operates in random noise operation mode, then stability and low noise are achieved, but the device cannot quickly recover from lock state loss
Solution Approach 1:
The patent applies dynamics by implementing adjustable gain that can be modified in response to lock state conditions. When lock is lost, the gain can be increased to facilitate faster reacquisition. This dynamic response allows the system to maintain stability during normal operation while enabling quick recovery when needed.
Solution Approach 2:
The patent uses feedback by monitoring the lock state and adjusting the open-loop gain accordingly. When lock is detected, the gain is reduced for stable operation; when lock is lost, the gain is increased for faster reacquisition. This feedback mechanism resolves the contradiction between stability and recovery speed.
Data Source
AI summary
A phase-locked loop device is configured to manage a transition from a relaxation-oscillation mode to a random noise operation mode. It is designed for progressively reducing proportional and integral coefficients that are implemented in a loop filter of the PLL device. Recovering the last values formerly used for the proportional and integral coefficients is also provided, in case the PLL lock state is lost. Such transition management may be combined with using a voltage-controlled oscillator within the PLL device, which has several control inputs.