PLL Holdover Queue for Jump-Free Frequency Recovery
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Solution Overview
Problem
Phase Locked Loops (PLLs) experience frequency steps when switching back to normal locking mode after holdover, due to discrepancies between the stored and reference frequencies, which can be exacerbated by frequency slope limiters.
Innovation Solution
A phase locked loop design that uses a holdover queue to store historical frequency offset values, allowing the PLL to seamlessly transition back to normal locking mode without frequency steps by feeding the holdover queue output directly to the loop filter and register, ensuring continuity of the frequency offset value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the PLL switches back to normal locking mode after holdover, then the reference signal tracking is restored, but a frequency step occurs on the output due to discrepancy between stored and holdover frequencies
Solution Approach 1:
The patent updates the loop filter's stored frequency value with the holdover frequency value before switching back to normal locking mode. This preliminary action ensures that when the mode transition occurs, there is no frequency discrepancy between the stored value and the holdover value, thereby preventing frequency steps on the output while maintaining reference signal tracking capability.
2Stability of the object's composition
If frequency slope limiters are present in the filter, then frequency variations are constrained, but frequency steps become larger under certain conditions
Solution Approach 1:
The patent applies preliminary anti-action by proactively updating the stored frequency value with the holdover frequency value before the mode transition. This counteracts the potential frequency step that would otherwise be generated by the frequency slope limiters, preventing the harmful effect before it can manifest in the output.
Data Source
AI summary
A phase locked loop with holdover mode has a loop filter for creating an offset frequency value for a controlled oscillator. The loop filter includes a register for storing the current offset frequency value the said controlled oscillator. A first multiplexer responsive to a holdover signal selects, depending on the quality of a reference signal, the output of the loop filter or a holdover queue to control the controlled oscillator. A second multiplexer responsive to the holdover signal selects for input to the register, depending on the quality of the reference signal, the sum of an output of the register and a value derived from the current phase difference between the output of the controlled oscillator and the reference signal or a current output value of the holdover queue.