PLL Injection Startup for Crystal Oscillator Wakeup

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Solution Overview

Problem

Existing crystal oscillator startup methods require long startup times and high energy consumption, which is undesirable for applications requiring rapid and efficient frequency stabilization, especially in IoT devices that frequently transition between sleep modes and active operations.

Innovation Solution

A crystal oscillator startup method utilizing a phase-locked loop (PLL) configured with stored parameters to generate an injection clock signal with a frequency matching the crystal oscillator frequency, combined with tristate drivers for fast injection and adaptive startup time management, allowing for quick and energy-efficient startup.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If traditional crystal oscillator startup methods are used, then the oscillator will start up, but the startup time is long and energy consumption is high

Engineering Contradiction:
Improvestartup timeVSAvoidenergy consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by pre-configuring the PLL with stored parameters before crystal oscillator startup. The PLL is prepared in advance with the correct frequency division ratios and control settings, so that when startup is initiated, the injection signal is immediately available at the correct frequency, eliminating the need for gradual frequency sweeping or waiting periods.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses the PLL as an intermediary device to generate the injection signal for crystal oscillator startup. Instead of directly driving the crystal oscillator with a simple RC oscillator or other startup circuits, the PLL acts as a mediator that produces a precise frequency signal matched to the crystal's resonant frequency, enabling faster and more efficient startup.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of time

If the PLL is configured with stored parameters for injection, then startup time is reduced, but the device complexity increases

Engineering Contradiction:
Improvestartup timeVSAvoidcircuit complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the PLL to serve multiple functions: it acts as both the frequency synthesis device for normal operation and the injection signal source for crystal oscillator startup. The same PLL circuitry, when configured with stored parameters, provides the precise frequency needed for both startup injection and subsequent RF frequency generation, eliminating the need for separate dedicated startup circuits.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements self-service by having the PLL use its own internal resources and configured parameters to generate the injection signal. The stored parameters within the PLL configuration enable it to autonomously produce the correct frequency division ratios and control signals needed for crystal startup, without requiring external control circuits or additional startup signal generation hardware.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11699974B1Utilizing the LC oscillator of a frequency synthesizer as an injection source for crystal oscillator startup
Publication Date: 2023.07.11 SILICON LABORATORIES INC
  • US11699974B1 patent drawing
  • US11699974B1 patent drawing
  • US11699974B1 patent drawing

AI summary

A frequency synthesizer on an integrated circuit provides a local oscillator (LO) signal for RF operations and also functions as an injection clock signal source during crystal oscillator startup. The integrated circuit goes into a sleep mode in which the crystal oscillator is off and responsive to a wakeup event the crystal oscillator starts up again using the injection clock signal sourced from the frequency synthesizer. Parameters that cause the injection clock signal to match the crystal oscillator frequency are stored. The frequency synthesizer includes a phase-locked loop having an LC oscillator. A digital to analog converter controls the LC oscillator during injection. During an initial power up of the integrated circuit, a PLL in the frequency synthesizer locks to the crystal oscillator frequency to determine the parameters to store for injection.