PLL Double Integrator Path With Intermittent gm Amplifier
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Solution Overview
Problem
Conventional PLL circuits face a trade-off between high-speed phase lock and stability, as increasing oscillation frequency leads to increased filter circuit area and mutual conductance, making it difficult to dynamically adjust the zero point for both high-speed phase lock and stability.
Innovation Solution
A PLL circuit with a double integrator path using an intermittent operation amplifier, where a pulse signal controls the gm amplifier to operate intermittently, reducing mutual conductance and allowing high-frequency oscillation without increasing filter circuit area, by dynamically adjusting the zero point before and after phase lock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the oscillation frequency is increased to achieve high-speed phase lock, then the phase lock speed is improved, but the filter circuit area and mutual conductance increase
Solution Approach 1:
The patent applies dynamics by making the gm amplifier operate intermittently rather than continuously. The operation state of the gm amplifier is dynamically switched based on whether phase lock has been achieved, allowing the system to adapt its characteristics in real-time. This resolves the contradiction by enabling high-speed phase lock when needed while maintaining stability when phase lock is achieved.
Solution Approach 2:
The patent implements periodic action through the intermittent operation of the gm amplifier. The amplifier operates periodically based on a control signal that determines whether phase lock has been achieved. This periodic operation allows the system to achieve high-frequency oscillation during the operating periods while maintaining stability during non-operating periods, thereby resolving the area-mutual conductance trade-off.
2Area of stationary object
If the mutual conductance gm is reduced to decrease filter circuit area, then the filter circuit area is reduced, but the oscillation frequency decreases
Solution Approach 1:
The patent makes the mutual conductance dynamic by controlling the gm amplifier to operate intermittently. When phase lock is not achieved, the gm amplifier operates to provide high mutual conductance for high-frequency oscillation. When phase lock is achieved, the gm amplifier stops operating to reduce mutual conductance. This dynamic adjustment resolves the contradiction between filter circuit area and oscillation frequency.
Solution Approach 2:
The patent changes the operational parameter of the gm amplifier from continuous to intermittent based on the phase lock state. This parameter change allows the system to switch between high mutual conductance (for high-frequency oscillation) and low mutual conductance (for reduced filter circuit area), thereby resolving the contradiction.
3Speed
If the zero point is arranged at high frequency for high-speed phase lock, then the phase lock speed is improved, but the circuit stability deteriorates
Solution Approach 1:
The patent makes the zero point position dynamic by controlling the gm amplifier's operation state. Before phase lock, the gm amplifier operates to position the zero point at high frequency for fast phase lock. After phase lock, the gm amplifier stops operating to move the zero point to low frequency for circuit stability. This dynamic positioning resolves the contradiction between phase lock speed and circuit stability.
Solution Approach 2:
The patent uses feedback from the phase lock detection mechanism to control the gm amplifier's operation. The control signal that determines whether to operate the gm amplifier is generated based on the phase lock detection result, creating a feedback loop that automatically adjusts the zero point position according to the system's operational state, thereby resolving the contradiction.
4Stability of the object's composition
If the zero point is arranged at low frequency for circuit stability, then the circuit stability is improved, but the phase lock speed decreases
Solution Approach 1:
The patent implements periodic action by controlling the gm amplifier to operate only during specific periods (when phase lock is not achieved). During these periodic operation intervals, the zero point is positioned at high frequency for fast phase lock. During non-operation intervals (after phase lock), the zero point is positioned at low frequency for stability. This periodic switching resolves the contradiction between circuit stability and phase lock speed.
Data Source
AI summary
A PLL circuit includes a phase comparator, an integrator path, a proportional path, a current controlled oscillator, a divider, and a double integrator path. The double integrator path includes an intermittent operation gm amplifier, a filter circuit, and a voltage-current conversion circuit. The intermittent operation gm amplifier receives an output voltage of a filter circuit. When a pulse CLK for an intermittent operation is ON, the intermittent operation gm amplifier outputs its voltage to the filter circuit. When the pulse CLK for the intermittent operation is OFF, the intermittent operation gm amplifier does not output the output voltage of the filter circuit to the filter circuit. Even when the pulse CLK for the intermittent operation is OFF, an input potential of the voltage-current conversion circuit is held by the filter circuit, and a current to the current controlled oscillator flows. This makes it possible to oscillate at a high frequency without increasing an area of the filter circuit.