PLL Loop Filter Leakage Compensation for Stable VCO Frequency
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Solution Overview
Problem
Phase locked loop (PLL) circuits face variations in oscillation frequency due to leakage current, which can disrupt the stability of clock signals in electronic systems.
Innovation Solution
A PLL circuit design that includes a voltage adjusting unit, a loop filter, a voltage-controlled oscillator (VCO), and a current control circuit to generate a compensation current that counterbalances leakage current, maintaining a constant frequency control voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a loop filter is used to generate frequency control voltage in a PLL circuit, then the frequency control voltage can be generated and filtered, but leakage current causes the voltage level to shift over time, leading to frequency variations
Solution Approach 1:
The patent implements a feedback mechanism where the voltage level detector continuously monitors the frequency control voltage level and feeds back control signals to the switch circuit. This closed-loop feedback system automatically adjusts the charging/discharging operations to maintain the voltage level within the predetermined range, compensating for leakage current effects and preventing frequency drift.
Solution Approach 2:
The system performs self-correction by using the voltage level detector and control circuitry to automatically detect and compensate for voltage level shifts caused by leakage current. The circuit self-regulates the charging and discharging of the loop filter capacitor without external intervention, maintaining stable operation despite inherent leakage losses.
2Reliability
If the frequency control voltage level shifts due to leakage current, then the VCO output frequency varies, but adding compensation circuitry increases system complexity
Solution Approach 1:
The patent combines the voltage level detection function and the control signal generation function into an integrated control circuit that works closely with the existing charge pump and loop filter. The switch circuit merges the charging and discharging paths under unified control, creating a compact structure that adds minimal complexity while achieving reliable frequency stabilization.
Solution Approach 2:
The patent introduces a voltage level detector as an intermediary component that bridges the loop filter output and the VCO input. This intermediary monitors the voltage level and generates appropriate control signals to adjust the charging/discharging operations, acting as a mediator that corrects leakage effects without requiring major structural changes to the core PLL architecture.
3Ease of operation
If charge pumping is used to adjust voltage level, then frequency control is achieved, but the voltage level may drift outside the optimal range due to leakage current
Solution Approach 1:
The patent employs periodic charging and discharging actions controlled by the switch circuit and voltage level detector. Instead of continuous charging, the system periodically charges the loop filter capacitor when voltage drops below the lower threshold and periodically discharges when voltage exceeds the upper threshold. This periodic action maintains voltage within the optimal range while compensating for continuous leakage current.
Solution Approach 2:
The patent transforms the static charge pump operation into a dynamic system where the charging and discharging rates can be adjusted based on real-time voltage level conditions. The switch circuit dynamically changes the charge pump state (charging, discharging, or holding) according to the detected voltage level, enabling adaptive control that maintains stability despite varying leakage conditions.
Data Source
AI summary
A phase locked loop (PLL) circuit and a system including such a PLL that may at least compensate for leakage current in a loop filter. The PLL circuit may include a voltage adjusting unit configured to pump charges based on a phase difference between an oscillation clock signal and a reference clock signal, a loop filter configured to generate a frequency control voltage, a level of which is shifted by the charge pumping of the voltage adjusting unit, a voltage controlled oscillator (VCO) configured to output the oscillation clock signal having a frequency corresponding to the frequency control voltage, and a current control circuit configured to generate a compensation current corresponding to a leakage current generated by the loop filter and allow the compensation current and the leakage current to substantially and/or completely counterbalance each other.