Shared PLL Lock-Detect Circuit Selection for Resource Efficiency
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Solution Overview
Problem
Existing electrical systems face inefficiencies in resource utilization due to lock-detect circuitry being idle for long periods when PLL modules are stable, and the need for adaptable lock-detect solutions to accommodate various PLL configurations, which can affect the quality of clock signals.
Innovation Solution
Implementing a system with internal and external lock-detect circuitries coupled with a selector module, and a lock-detect bank with multiple modules that can route and select appropriate lock-detect signals based on PLL configurations, allowing for flexible and efficient use of lock-detect resources across multiple PLL modules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated lock-detect circuitry is allocated to each PLL module, then each PLL can independently detect lock status, but circuit resource utilization becomes inefficient and occupies excessive physical space
Solution Approach 1:
The patent implements a shared lock-detect circuit that can be dynamically allocated to multiple PLL modules through a selector module. This single lock-detect circuit serves multiple PLLs by switching between them based on which PLL currently requires lock detection, thereby reducing overall circuit resource occupation while maintaining the ability to reliably detect lock status for any individual PLL module
Solution Approach 2:
The patent combines multiple lock-detect circuitries into a single shared lock-detect circuit that handles detection for multiple PLL modules. By merging the detection functionality and using a selector to route different PLL outputs to the same detection circuit, the system reduces redundant circuitry and optimizes physical space usage
2Adaptability or versatility
If multiple lock-detect circuitries are implemented for different PLL configurations, then adaptability to various PLL types is improved, but device complexity increases
Solution Approach 1:
The shared lock-detect circuit is designed with universal functionality to handle different PLL configurations through the selector module. Rather than implementing separate specialized detection circuits for each PLL type, the system uses one adaptable detection circuit that can be configured via the selector to work with various PLL modules, thereby maintaining adaptability while reducing complexity
Solution Approach 2:
The selector module acts as an intermediary between multiple PLL modules and the single lock-detect circuit. It manages the routing and coordination, allowing the lock-detect circuit to adapt to different PLL configurations without requiring multiple specialized detection circuits, thus simplifying the overall system architecture
3Measurement precision
If lock-detect circuitry operates continuously to ensure accurate lock status detection, then detection accuracy is maintained, but power consumption increases
Solution Approach 1:
The system uses periodic or on-demand lock detection instead of continuous operation. The selector module enables the lock-detect circuit to be activated only when a PLL module requires status verification, allowing the circuit to remain idle or enter low-power states between detection events, thereby maintaining detection accuracy while reducing overall power consumption
Data Source
AI summary
Systems and methods related to phase-locked loops circuitry and lock-detect circuitry are provided. Some of the systems and methods allow sharing of lock-detect circuitries between multiple phase-locked loops or other suitable circuitry. Others allow multiple circuitries to select from multiple lock-detect circuitries that may use different lock-detect techniques.