PLL Lock Detection Circuit Using Integrated Phase Difference
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Solution Overview
Problem
Existing lock detection circuits cannot accurately calculate the degree of convergence of an output signal in phase-locked loop circuits, especially when frequency changes cause damped oscillations, as they rely solely on comparing phase differences with threshold values.
Innovation Solution
Incorporating an integrating circuit to integrate phase differences during transient and convergence periods, and a degree-of-convergence calculating circuit to determine the convergence degree from these integrations, allowing for precise calculation of signal convergence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If phase difference threshold comparison is used for lock detection, then the detection method is simple, but the convergence degree cannot be accurately calculated during damped oscillation periods
Solution Approach 1:
The invention changes from simple threshold comparison to integrating the phase difference signal over time, transforming the detection parameter from instantaneous phase difference to cumulative phase error. This integration approach accurately reflects the convergence degree even during damped oscillations, as it considers the overall phase behavior rather than momentary fluctuations.
2Adaptability or versatility
If division ratio is changed to adjust output frequency, then frequency adaptability is improved, but damped oscillation occurs causing inaccurate convergence detection
Solution Approach 1:
The invention introduces feedback by continuously integrating the phase difference signal and using this integrated value to determine lock status. The integration process inherently provides feedback about the cumulative phase error, allowing the system to reliably detect convergence even when damped oscillations occur due to division ratio changes. This feedback mechanism transforms unreliable instantaneous phase comparisons into reliable convergence detection.
Data Source
AI summary
A lock detection circuit is configured to include an integrating circuit that integrates a phase difference between a frequency-divided signal of a VCO and a reference signal during a constant period within a transient response period for an output signal from the VCO, and integrates a phase difference between the frequency-divided signal and the reference signal during a constant period within a convergence period for the output signal from the VCO; and a degree-of-convergence calculating circuit that calculates a degree at which the output signal from the VCO has converged, from a result of the integration of the phase difference obtained by the integrating circuit during the constant period within the transient response period and a result of the integration of the phase difference obtained by the integrating circuit during the constant period within the convergence period.


