Dual-Branch PLL Synthesizer with Frequency Lock Verification
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Solution Overview
Problem
PLL synthesizers with fast tuning speed and low phase-noise may lock to incorrect frequencies due to unusual circumstances such as temporary failures of the low-pass filter or loss of bias, necessitating a mechanism to confirm correct frequency locking.
Innovation Solution
A frequency accuracy indicator is integrated into the PLL synthesizer to continuously monitor and verify that the synthesizer is locked to the correct frequency by comparing frequencies generated in different branches, utilizing a dual-branch architecture with a VCO locked by either a conventional divider loop or a low phase-noise mixer loop, and providing a signal indicating phase lock and frequency accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a dual-branch PLL synthesizer architecture is used to achieve fast tuning speed and low phase-noise, then tuning speed and phase-noise performance are improved, but the risk of false locking to incorrect frequencies increases
Solution Approach 1:
The patent implements a frequency accuracy indicator that continuously monitors the PLL output frequency and provides feedback to detect false locking conditions. The indicator compares the actual output frequency with the expected frequency based on the reference frequency and divider ratio, generating an accuracy indicator signal that alerts when frequency deviation occurs, thus resolving the reliability issue while maintaining the dual-branch architecture's speed and phase-noise advantages
Solution Approach 2:
The frequency accuracy indicator serves as an intermediary monitoring component between the PLL synthesizer and the output stage. It independently verifies frequency accuracy by comparing frequencies from different branches without disrupting the main signal path, enabling detection of false locking without affecting the fast tuning speed or low phase-noise performance of the dual-branch architecture
2Reliability
If a frequency accuracy indicator is added to monitor frequency locking accuracy, then frequency locking accuracy is improved, but device complexity increases
Solution Approach 1:
The frequency accuracy indicator is designed to perform multiple functions: it monitors frequency accuracy, detects false locking conditions, and provides indication signals for both frequency accuracy and phase lock status. By consolidating these monitoring functions into a single integrated circuit block that utilizes existing signal paths in the dual-branch architecture, the patent achieves improved frequency locking accuracy while minimizing the increase in device complexity
Solution Approach 2:
The frequency accuracy indicator utilizes existing signals within the PLL synthesizer (reference frequency, divider output, and VCO output) to perform self-verification of frequency accuracy. The indicator circuit independently processes these available signals through frequency comparison and logical operations to generate accuracy indication, without requiring external monitoring equipment or additional complex circuitry, thus improving reliability with minimal complexity overhead
Data Source
AI summary
A phase-locked loop (PLL) frequency synthesizer includes a phase detector, a low pass filter coupled to the phase detector, an amplifier coupled to the low pass filter, a voltage controlled oscillator (VCO) coupled to the amplifier, a power splitter coupled to the VCO, and a switch configured to select between a first branch and a second branch through which to couple the power splitter to the phase detector. The first branch includes a frequency divider while the second branch includes a mixer. The PLL frequency synthesizer also includes a frequency accuracy indicator that compares a frequency in the first branch with a frequency generated in the second branch, and confirms that the PLL frequency synthesizer is locked to a desired frequency upon receiving a phase lock signal, if the frequency generated in the first branch is the same as the frequency generated in the second branch.