PLL Loop Filter Switching Without Parasitic Phase Drift

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Solution Overview

Problem

The existing PLL circuits face issues with variations in phase and frequency characteristics due to parasitic elements from switch circuits, which affect the cut-off frequency and lock-up time, leading to deterioration in performance.

Innovation Solution

The implementation of a PLL circuit with separate current signal generation circuits for each loop filter, eliminating the need for switch circuits between these circuits, thereby preventing parasitic element interference and maintaining consistent phase and frequency characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If switch circuits are used to select between different loop filters, then the PLL circuit can be configured for different cut-off frequencies, but parasitic elements from the switch circuits cause variations in phase and frequency characteristics

Engineering Contradiction:
Improveconfigurability of cut-off frequencyVSAvoidstability of phase and frequency characteristics
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent extracts and removes the switch circuits from the signal path between the current signal generation circuit and loop filters. By eliminating the switch circuits, the parasitic elements (on-resistance and parasitic capacitance) that caused variations in phase and frequency characteristics are removed, while the ability to select different loop filters is preserved through direct connection architecture.

Inventive Principle:
Principle #2Taking out (Extraction)

2Adaptability or versatility

If switch circuits are placed between the current signal generation circuit and loop filters, then loop filter selection is enabled, but the on-resistance and parasitic capacitance of the switch circuits affect the cut-off frequency and lock-up time

Engineering Contradiction:
Improveselectability of loop filtersVSAvoidprecision of cut-off frequency and lock-up time
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The switch circuits are extracted and removed from the critical signal path. The patent connects the current signal generation circuit directly to multiple loop filters without intermediate switch circuits, thereby eliminating the parasitic on-resistance and parasitic capacitance that would otherwise affect the precise control of cut-off frequency and lock-up time.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If multiple loop filters with different cut-off frequencies are implemented, then the PLL can meet different system requirements, but the parasitic elements cause deterioration in performance

Engineering Contradiction:
Improveability to meet different system requirementsVSAvoidperformance stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent segments the connection between the current signal generation circuit and each loop filter into independent direct connection paths. Each loop filter can be selected and connected without sharing common switch circuits, thereby isolating the performance of each loop filter from parasitic element interference and maintaining stable performance across different configurations.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8212596B2PLL circuit
Publication Date: 2012.07.03 RENESAS ELECTRONICS CORP
  • US8212596B2 patent drawing
  • US8212596B2 patent drawing
  • US8212596B2 patent drawing

AI summary

There is provided a PLL circuit including a first loop filter and a second loop filter, which includes a current signal generation circuit that includes a first output driver that generates a first current signal to be output to the first loop filter and a second output driver that generates a second current signal to be output to the second loop filter, and a control circuit that selects which of the first output driver and the second output driver is to be activated.