PLL Mode Restoration Using Retained State After Power-Down
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Solution Overview
Problem
Conventional microcomputers face challenges in efficiently transitioning between PLL normal-oscillation and PLL self-oscillation modes for power management, resulting in high current consumption and long stabilization times during intermittent operations, which is not suitable for applications requiring low power consumption and strict module specifications.
Innovation Solution
A semiconductor device with a PLL circuit capable of switching between PLL normal-oscillation and PLL self-oscillation modes, featuring an information holding unit to distinguish between operation modes and control the stabilization wait time, allowing the microcomputer to return to the previous state after power-down, thereby reducing current consumption and stabilizing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the microcomputer transits from PLL normal-oscillation mode to low power consumption mode and returns, then power consumption is reduced, but current consumption upon return becomes large and stabilization wait time increases
Solution Approach 1:
The patent applies preliminary action by pre-setting different stabilization wait time periods based on the operation mode before power-down. The control unit stores the operation mode information and selects the appropriate stabilization time period in advance, so that when the microcomputer returns from low power consumption mode, the correct stabilization time is already determined, avoiding the need for lengthy stabilization waiting and reducing the stabilization wait time while maintaining low power consumption benefits.
2Use of energy by moving object
If the microcomputer transits from PLL normal-oscillation mode to low power consumption mode and returns, then power consumption is reduced, but current consumption upon return becomes large
Solution Approach 1:
The control unit performs preliminary action by storing the operation mode information before power-down and determining the appropriate stabilization time period in advance. This allows the system to optimize the power supply resumption process by applying the correct stabilization time, thereby reducing the peak current consumption upon return from low power consumption mode while maintaining the power consumption reduction benefit.
3Device complexity
If the microcomputer cannot distinguish between PLL normal-oscillation mode and PLL self-oscillation mode, then device complexity is reduced, but the ability to optimize power consumption and stabilization time is compromised
Solution Approach 1:
The patent introduces an intermediary element - a control unit with a storage unit - that records the operation mode information. This intermediary component enables the system to distinguish between PLL normal-oscillation mode and PLL self-oscillation mode without significantly increasing device complexity. The control unit uses this stored information to determine the appropriate stabilization time period, thereby maintaining mode switching capability and optimization ability while keeping the overall device complexity manageable.
Data Source
AI summary
Even after power-down, distinction between a transition from a PLL normal-oscillation state and a transition from a PLL self-oscillation is allowed.A semiconductor device includes a first region which, after having transited from a power-supply state to a power-down state, returns to the power-supply state again, a second region which holds a power source voltage regardless of power-down of the first region, and an oscillator which generates a first clock signal supplied to the first region. The first region includes a PLL circuit. The second region includes an information holding unit capable of holding information which can distinguish whether the operation mode of the PLL circuit is a PLL normal-oscillation mode or a PLL self-oscillation mode, and determines the operation mode of the PLL circuit when the first region has returned from the power-down state to the power-supply state, according to the information held in the information holding unit.