PLL Double-Point Modulator Gain Calibration for Fast Frequency Hopping
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Solution Overview
Problem
Classic double-point modulators face challenges in accurately matching the gains of digital and analog modulation paths, leading to limited bandwidth and inefficient calibration, especially in applications like Bluetooth transmission where carrier frequency changes frequently.
Innovation Solution
A phase-locked loop double-point modulator with a calibration circuit that adjusts gains based on frequency measurements during an open-loop calibration phase, using a selector switch and attenuator to reduce the output deviation in normal operation, and a digital-to-analog converter to produce an analog modulation signal with a higher deviation for calibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the calibration duration is increased to improve frequency measurement accuracy, then the accuracy of frequency measurements improves, but the calibration time becomes excessively long for applications with frequent carrier frequency changes
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing a calibration lookup table that maps modulation signal deviations to corresponding frequency deviations. During calibration, the system only needs to query this pre-computed table rather than performing lengthy measurements, thus achieving accurate frequency measurement without excessive calibration time.
Solution Approach 2:
The patent uses partial action by applying a reduced calibration duration that is sufficient for the required accuracy level in frequency-hopping applications. Instead of performing complete or excessive calibration measurements, the system uses a calibrated lookup table approach that provides adequate precision with significantly reduced measurement time.
2Measurement precision
If the gain of the analog modulation signal is increased to improve calibration accuracy, then the calibration accuracy improves, but the output deviation becomes excessively high for normal operation
Solution Approach 1:
The patent applies dynamics by making the attenuation factor adjustable based on operating mode. During calibration, the attenuation is reduced or disabled to allow high modulation signal deviation for accurate frequency measurement. During normal operation, the attenuation is increased to reduce the deviation to appropriate levels, thus adapting the system behavior to different operational requirements.
Solution Approach 2:
The patent changes the attenuation parameter dynamically between calibration and normal operation modes. The attenuation factor is set to a first value (lower attenuation) during calibration to maximize measurement accuracy, and switched to a second value (higher attenuation) during normal operation to maintain proper signal levels and deviation characteristics.
3Measurement precision
If the modulation signal deviation is increased during calibration to improve gain matching accuracy, then the gain matching accuracy improves, but the frequency deviation becomes too large for practical operation
Solution Approach 1:
The patent makes the attenuation factor dynamic, switching between a first value during calibration and a second value during normal operation. This allows the system to tolerate large frequency deviations during calibration for accurate gain matching, while automatically reducing the deviation to appropriate levels during normal operation.
Solution Approach 2:
The patent introduces an adjustable attenuation factor as an intermediary element between the modulation signal source and the frequency divider. This intermediary allows decoupling of the calibration process from normal operation requirements, enabling large signal deviations during calibration without affecting the frequency deviation control during normal operation.
Data Source
AI summary
A phase-locked loop double-point modulator may include a frequency divider having a ratio which can be changed by a first modulation signal, and an oscillator, a frequency of which can be changed by a second modulation signal correlated to the first modulation signal. A calibration circuit may be configured, in a calibration mode, to match the gains of the first and second modulation signals based on frequency measurements of the oscillator for two different calibration values of the second modulation signal. The phase-locked double-point modulator may also include an attenuator having a constant ratio greater than 1 and placed in the path of the second modulation signal, and a selector switch configured to be controlled by the calibration circuit to reduce the ratio of the attenuator in the calibration mode.