PLL Circuit Phase Compensation for Parasitic Capacitance
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Solution Overview
Problem
The operation of PLL circuits becomes unstable due to parasitic capacitance between the loop filter and voltage controlled oscillator, affecting clock and data recovery in CDR apparatus.
Innovation Solution
Incorporating a phase compensation unit in parallel with the charge pump, which adds a differentiation term to the open-loop transfer function, and using a buffer with a third capacitance element to stabilize the PLL circuit, thereby suppressing the influence of parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a loop filter with second capacitance element is used in the PLL circuit, then the frequency response and stability are improved, but parasitic capacitance from wires and VCO configuration adds to the second capacitance element causing operation instability
Solution Approach 1:
A buffer circuit is introduced as an intermediary component between the loop filter and the VCO. This buffer acts as a mediator that isolates the parasitic capacitance at the VCO input from affecting the loop filter's second capacitance element, thereby preventing the parasitic capacitance from destabilizing the PLL operation while maintaining the frequency response benefits of the loop filter configuration
2Reliability
If parasitic capacitance is added to the second capacitance element of the loop filter, then the capacitance value increases, but the PLL circuit operation becomes unstable and CDR apparatus clock recovery becomes unstable
Solution Approach 1:
The buffer circuit serves as an intermediary that electrically isolates the loop filter's second capacitance element from the parasitic capacitance at the VCO input. This isolation prevents the parasitic capacitance from altering the effective capacitance value in the loop filter, thereby maintaining both PLL operation stability and reliable clock recovery functionality
Data Source
AI summary
A PLL circuit includes a phase comparator, a charge pump 20, a loop filter 30, a voltage controlled oscillator 40, a frequency divider, and a phase compensator 70. The loop filter 30 includes a resistor 31, a first capacitance element 32, and a second capacitance element 33. The phase compensator 70 is provided in parallel to the charge pump 20 and adds a differentiation term to an open-loop transfer function. The phase compensator 70 includes a buffer 71 receiving a phase difference signal output from the phase comparator and a third capacitance element 72 provided between an output terminal of the buffer 71 and an input terminal of the loop filter 30.