PLL Phase Tracker for Real-Time Drift Compensation
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Solution Overview
Problem
Phase locked loop circuits experience phase drift due to interruptions, such as changes in channel frequency or mode transitions, leading to performance degradation in other circuits that rely on known phase information, requiring time-consuming recalibration.
Innovation Solution
A phase tracking circuit that determines and tracks phase drift in real-time, providing the updated phase information to other circuits like spur cancellation circuits, thereby avoiding recalibration procedures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If phase locked loop circuits are interrupted for channel frequency changes or mode transitions, then adaptability is improved, but phase drift occurs causing performance degradation in other circuits
Solution Approach 1:
The phase tracker circuit continuously tracks and stores phase information before interruptions occur. When channel frequency changes or mode transitions happen, the pre-tracked phase data is available immediately, preventing phase drift effects on other circuits while maintaining adaptability to frequency changes
2Measurement precision
If recalibration procedures are performed to correct phase drift, then phase information accuracy is improved, but time consumption increases
Solution Approach 1:
The phase tracker circuit operates continuously to track phase information without interruption. This continuous tracking eliminates the need for periodic recalibration procedures, maintaining high phase information accuracy while preventing time loss that would otherwise be required for recalibration
Solution Approach 2:
The phase tracker provides real-time feedback on phase drift conditions to the system. This feedback mechanism enables the system to maintain accurate phase information dynamically without requiring time-consuming recalibration procedures, as the tracker continuously compensates for drift effects
Data Source
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AI summary
A phase locked loop includes a feedforward path receiving a reference signal having a reference frequency and outputting an output signal having an output frequency that is a function of the reference signal and a feedback signal. The phase locked loop further includes a feedback path having a divider circuit associated therewith that is configured to receive the output signal and generate the feedback signal having a reduced frequency based on a divide value of the divider circuit. The feedback signal is supplied to the feedforward path. The phase locked loop also includes a modulator circuit configured to receive modulation data and provide a divider control signal to the divider circuit to control the divide value thereof, and a phase tracker circuit configured to determine an amount of phase drift from an initial phase value of the output signal due to an interruption in a locked state of the phase locked loop.