PLL Dynamic Phase Offset Measurement Under Spread Spectrum Clocks
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Solution Overview
Problem
The lack of standardized methods for measuring dynamic phase offset (DPO) in phase-locked loops (PLLs) and frequency synthesizers hinders the assurance of performance compliance, as manufacturers lack a defined test measurement method, leading to uncertainty in user conditions.
Innovation Solution
A method and apparatus for measuring dynamic phase offset by comparing phase jitter measurements between static and spread spectrum modulation modes, using a time domain analytical instrument to determine the dynamic phase offset by measuring phase jitter in both modes and calculating the difference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If no standardized measurement method is established for dynamic phase offset, then manufacturers can advertise DPO performance freely, but users cannot verify test conditions and measurement reliability
Solution Approach 1:
The patent establishes a standardized measurement method that defines specific parameters for DPO measurement, including the use of spread spectrum modulation with defined deviation ratios (typically 0.1% to 10% of center frequency) and modulation frequencies (typically 1 kHz to 1 MHz). This standardization transforms the previously undefined measurement process into a controlled procedure with specified parameters, allowing both manufacturers and users to operate under the same conditions while maintaining measurement reliability and comparability
2Ease of operation
If dynamic phase offset measurement is performed without standardized test conditions, then measurement flexibility is maintained, but measurement reliability and consistency across different manufacturers cannot be ensured
Solution Approach 1:
The patent segments the DPO measurement process into distinct, standardized stages: (1) applying spread spectrum modulation to the PLL input clock with defined parameters, (2) measuring the PLL output clock frequency deviation, (3) calculating DPO using the formula DPO = Δf/f_center × 100%, and (4) comparing against specified limits. This segmentation provides both flexibility in implementation and reliability through standardized procedures at each stage
Solution Approach 2:
The patent defines specific parameter ranges for spread spectrum modulation including deviation ratio (0.1% to 10% of center frequency) and modulation frequency (1 kHz to 1 MHz), creating a standardized measurement framework that maintains flexibility within defined boundaries while ensuring reliability through consistent parameter usage across different measurements and manufacturers
Data Source
AI summary
In one embodiment, a method is provided for measuring a dynamic phase offset between a PLL's input clock and the PLL's feedback input clock, wherein the input clock is spread spectrum modulated in a spread spectrum mode and is not modulated in a static mode. The method includes: in the spread spectrum mode, measuring phase jitter between the input clock and the feedback input clock to form a spread spectrum phase jitter measurement; in the static mode, measuring phase jitter between the input clock and the feedback input clock to form a static phase jitter measurement; and comparing the spread spectrum phase jitter measurement to the static phase jitter measurement to determine the dynamic phase offset.