PLL Performance Indicator for Phase Path Calibration
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Solution Overview
Problem
Digital phase-locked loops (DPLLs) in polar transmitters face challenges in calibrating alignment circuitry due to complex interactions between phase and amplitude paths, leading to distortion and reduced performance, especially as oscillator linearity changes over time.
Innovation Solution
The implementation of performance indicator circuitry that calculates a value based on signals from the loop filter, independently of the amplitude path, to decouple and optimize the phase path, allowing for LP/HP delay and gain compensation, thereby improving phase modulation performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If alignment circuitry calibration is performed in DPLLs with complex interactions between phase and amplitude paths, then phase modulation performance can be optimized, but calibration complexity and time increase significantly
Solution Approach 1:
The patent segments the calibration process into two independent parts: phase path calibration using the performance indicator circuitry that measures only phase path signals (excluding amplitude path), and separate amplitude path calibration. This segmentation allows phase calibration to be performed independently without dealing with complex interactions, reducing calibration complexity while maintaining performance optimization
Solution Approach 2:
The performance indicator circuitry acts as an intermediary that provides direct measurement feedback of phase path performance. This intermediary enables automatic adjustment of phase path parameters without manual intervention or complex multi-path calibration procedures, simplifying the calibration process while achieving optimal phase modulation performance
2Reliability
If traditional calibration methods are used that account for amplitude path interactions, then comprehensive performance optimization is attempted, but calibration time increases
Solution Approach 1:
The calibration process is segmented into rapid phase path calibration using performance indicator measurements and separate amplitude path calibration. This segmentation enables the time-critical phase calibration to be completed quickly using direct measurements, while amplitude path calibration can be performed separately or with less time pressure, reducing overall calibration time while maintaining comprehensive performance optimization
Solution Approach 2:
The performance indicator circuitry enables the phase path to self-calibrate by providing direct performance measurements that can be used for automatic adjustment. This self-service capability eliminates the need for time-consuming manual calibration or complex iterative multi-path calibration procedures, significantly reducing calibration time while achieving optimal phase path performance
3Measurement precision
If oscillator linearity changes are compensated for in the amplitude path, then amplitude accuracy is maintained, but phase path performance degrades due to complex interactions
Solution Approach 1:
The patent segments the calibration and optimization processes into independent phase path and amplitude path operations. Phase path calibration uses performance indicator measurements that exclude amplitude path signals, allowing phase optimization without being affected by amplitude path adjustments or oscillator linearity changes in the amplitude path, thereby maintaining phase path performance while amplitude accuracy is maintained through separate calibration
Data Source
AI summary
Performance indicator circuitry is provided for characterizing performance of a phase locked loop (PLL) in a phase path of a polar modulator or polar transmitter that is used to generate a phase modulated RF signal. The PLL includes an oscillator, a high pass path, and a low pass path. The low pass path includes a loop filter. The performance indicator circuitry includes first input circuitry and parameter calculation circuitry. The first input circuitry is configured to input a loop filter signal from the loop filter. The parameter calculation circuitry is configured to compute a value for a performance indicator based on the loop filter signal and control or characterize an aspect of operation of the PLL based on the value.


