Fractional-N PLL Phase Shift Circuit for Reference-Synced Output
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Solution Overview
Problem
Conventional fractional N-type phase-locked loop frequency synthesizers lack the ability to control the phase of the output signal with respect to the reference signal, limiting their control capabilities.
Innovation Solution
Incorporating a frequency/phase control circuit that generates frequency division number control data based on setting data, allowing the phase-locked loop frequency synthesizer to control the phase of the output signal by synchronizing with either the feedback or reference signal, enabling phase control of the output signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a conventional F-PLL synthesizer is used, then the output frequency can be controlled by setting data N, K, and M, but the phase of the output signal with respect to the reference signal cannot be controlled
Solution Approach 1:
The frequency division number control data is segmented into an integer portion and a fractional portion, with the fractional portion further divided into an integer portion and a remainder portion. This segmentation allows independent control of frequency and phase parameters through separate data fields, enabling phase control while maintaining frequency synthesis functionality.
Solution Approach 2:
The patent adds a new dimension of control by introducing phase control capability to the conventional frequency-only control system. Through the frequency/phase control circuit, a second setting data field is added to the control interface, allowing simultaneous control of both frequency (first setting data) and phase (second setting data) dimensions of the output signal.
2Ease of operation
If frequency division number control data is generated based on setting data, then phase control is enabled, but the device complexity increases due to the frequency/phase control circuit
Solution Approach 1:
The frequency/phase control circuit is designed to perform multiple functions: it generates frequency division number control data based on first setting data for frequency control, and based on second setting data for phase control. This multi-functional design consolidates both frequency and phase control capabilities into a single circuit block, reducing overall system complexity despite adding phase control functionality.
Solution Approach 2:
The frequency/phase control circuit automatically generates the appropriate frequency division number control data by processing the setting data inputs. The circuit self-manages the complex timing and synchronization requirements for generating control data in synchronism with either the feedback or reference signal, eliminating the need for external complex control logic.
3Ease of operation
If the frequency/phase control circuit synchronizes with the feedback signal, then phase control is achieved, but the timing requirements become more stringent
Solution Approach 1:
The frequency/phase control circuit is designed to dynamically select its synchronization reference between the feedback signal and the reference signal. This dynamic capability allows the system to adapt to different operating conditions and timing requirements, making the timing synchronization more flexible and less stringent by choosing the most appropriate reference signal for the current operational state.
Data Source
AI summary
Provided is a phase-locked loop frequency synthesizer, including: a reference oscillator; a voltage controlled oscillator; a variable frequency divider that divides the high frequency signal in frequency to output a feedback signal; a phase comparator that compares the reference signal and the feedback signal with each other to output a phase comparison signal; a loop filter that outputs a control signal of the voltage controlled oscillator based on the phase comparison signal; and a frequency/phase control circuit that generates frequency division number control data in synchronism with any one of the feedback signal and the reference signal based on setting data which is input from an external to give an output frequency and setting data which is input from the external to give a phase to the reference signal, to thereby output the frequency division number control data to the variable frequency divider.