PLL-Based Power Supply Regulation for Digital Timing Closure
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Solution Overview
Problem
Digital circuits face challenges in achieving timing closure due to interference factors like temperature variations, voltage variations, and process corner differences, which are difficult to control and affect the synchronicity of logic gates.
Innovation Solution
A phase locked loop-based power supply circuit that includes a voltage-controlled oscillator (VCO) and a voltage regulator, where the phase locked loop circuit outputs a control voltage to stabilize the VCO frequency, and the power supply voltage is used to compensate for interference factors, reducing timing variations in the load circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional power supply circuits are used, then the circuit structure is simple, but timing variations occur due to interference factors like temperature and voltage variations
Solution Approach 1:
The patent combines the power supply circuit with the phase-locked loop (PLL) circuit by using the control voltage output from the PLL to regulate the power supply voltage. This merging allows the power supply to dynamically adjust according to timing requirements while reusing existing PLL components, thereby improving timing closure without proportionally increasing circuit complexity.
Solution Approach 2:
The control voltage generated by the PLL circuit serves dual purposes: it controls the voltage-controlled oscillator (VCO) frequency and simultaneously regulates the power supply voltage through the voltage regulator. This multi-functionality reduces the need for separate control circuits and enables timing compensation while maintaining reasonable circuit complexity.
2Reliability
If power supply voltage is increased to ensure timing closure, then timing variations are reduced, but power consumption increases
Solution Approach 1:
The patent implements dynamic power supply voltage adjustment by using the PLL control voltage to regulate the power supply. Instead of using a fixed high voltage to guarantee timing closure under all conditions, the system dynamically adjusts the voltage based on actual timing requirements and interference factors, thereby reducing power consumption while maintaining timing closure.
Solution Approach 2:
The system changes the power supply voltage parameter dynamically based on the control voltage from the PLL. By adjusting the voltage regulator's reference voltage according to the PLL output, the power supply voltage adapts to varying timing requirements and environmental conditions, avoiding the need for consistently high voltage operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces or eliminates the impact of interference factors on timing variations, enabling better timing closure in digital circuits while minimizing power consumption by dynamically adjusting the power supply voltage according to changing interference conditions.
Implementation Method 1
a phase locked loop circuit, which includes a voltage-controlled oscillator (VCO), and the phase locked loop circuit outputs, through an output end of the phase locked loop circuit, a control voltage used for controlling the VCO
Implementation Method 2
a voltage regulator, an input end of the voltage regulator is connected with the output end of the phase locked loop circuit, such that the control voltage outputted by the phase locked loop circuit forms a power supply voltage after passing through the voltage regulator
Data Source
AI summary
The present disclosure provides a phase locked loop-based power supply circuit and method, and a chip. The phase locked loop-based power supply circuit includes: a phase locked loop circuit, including a voltage-controlled oscillator (VCO), the phase locked loop circuit outputs, through an output end of the phase locked loop circuit, a control voltage for controlling the VCO; and a voltage regulator, an input end of the voltage regulator is connected with the output end of the phase locked loop circuit, to make the control voltage outputted by the phase locked loop circuit form a power supply voltage after passing through the voltage regulator; the power supply voltage is used for supplying power for a load circuit; the load circuit includes at least one logic gate. The phase locked loop-based power supply circuit reduces timing variations in a digital circuit, and is conducive to implementing timing closure.