PLL Precharge Calibration Circuit for Faster Re-Locking
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Solution Overview
Problem
Conventional lock loop circuits, such as phase lock loop (PLL) circuits, take too long to lock frequency and phase, and they suffer from increased power consumption and noise due to capacitor leakage.
Innovation Solution
The implementation of a precharge circuit, calibration circuit, and floating ground loop filter in the lock loop circuit, which determines and digitally stores a calibration value before entering a disabled mode, allowing for faster re-locking when enabled and reducing leakage current by bypassing capacitive elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a loop precharger is used to reduce lock time, then the time required for the PLL circuit to lock frequency and phase is reduced, but the circuit complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-charging the loop filter capacitors before the PLL circuit begins operation. The precharger circuit charges capacitors C1 and C2 to predetermined voltage levels in advance, so when the PLL is enabled, the capacitors are already prepared to quickly establish the control voltage, dramatically reducing lock time without requiring continuous high-power operation
Solution Approach 2:
The patent changes the voltage parameters of the loop filter capacitors dynamically. The precharger circuit modifies the voltage across capacitors C1 and C2 from their normal operating levels to elevated precharge levels temporarily. This parameter change allows the capacitors to rapidly supply the initial current needed for fast locking, then returns to normal operation once locked
2Reliability
If capacitors are used in the loop filter, then filtering capability is provided, but leakage current increases power consumption and noise
Solution Approach 1:
The patent converts the harmful leakage current effect into a beneficial feature. By intentionally pre-charging the capacitors to higher voltages than normal operation, the circuit anticipates and compensates for the leakage current that will occur. The precharged capacitors maintain adequate voltage levels despite leakage, ensuring continuous operation without requiring additional power during normal running
3Use of energy by stationary object
If the PLL circuit is disabled to save power, then power consumption is reduced, but lock time increases when re-enabled
Solution Approach 1:
The patent performs preliminary action by maintaining the loop filter capacitors in a pre-charged state even when the PLL circuit is disabled. The precharger circuit periodically recharges the capacitors during disabled periods, so when the PLL is re-enabled, the capacitors are already prepared to provide immediate current, enabling fast re-locking without consuming excessive power during the disabled state
Data Source
AI summary
A lock loop circuit (216) includes a precharge circuit (304), an oscillator circuit (306), and a calibration circuit (309). The calibration circuit includes at least one register (362). The precharge circuit provides a precharge signal (347). The oscillator circuit provides an output frequency signal (228) in response to a steering signal (334) that is based on the precharge signal. The calibration circuit, prior to the lock loop circuit entering a disabled mode of operation, determines a calibration value (368) for the precharge circuit based on the precharge signal and the steering signal. The calibration circuit stores the calibration value as a digital calibration value (370) in the register.