PLL Pulse Limiter for Transient Phase Jitter Cancellation
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Solution Overview
Problem
Integrated circuits face issues due to transient phase jitter in phase-locked loops (PLLs) caused by factors like electrostatic discharge or switching between redundant clock sources, leading to significant phase changes that negatively impact downstream circuitry.
Innovation Solution
A pulse limiter circuit within the PLL detects transient phase jitter by comparing pulse widths and, if they exceed a selected duration, cancels any phase adjustment to the feedback clock signal, ensuring stable operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the PLL responds to large phase changes in the reference signal, then the phase detector produces a large feedback response, but this causes negative impact on downstream circuitry due to transient phase jitter
Solution Approach 1:
A pulse width comparator is introduced as an intermediary component between the phase detector and charge pump. This comparator compares the pulse width from the phase detector against a threshold value and only allows feedback when the phase difference is within an acceptable range, thereby filtering out harmful transient phase jitter while preserving legitimate phase correction signals
Solution Approach 2:
The system changes the parameter being monitored from raw phase difference to pulse width, and introduces a threshold parameter to distinguish between acceptable and unacceptable phase variations. By comparing pulse width against a predetermined threshold, the system selectively responds to phase changes based on their magnitude, preventing downstream circuitry from being affected by transient jitter
2Stability of the object's composition
If the PLL makes continuous phase adjustments to track the reference signal, then the output signal follows the reference phase, but transient phase jitter causes unnecessary updates that destabilize the system
Solution Approach 1:
The pulse width comparator performs preliminary filtering by comparing pulse width against a threshold before the phase adjustment is executed. This preliminary anti-action prevents harmful phase adjustments from reaching the charge pump and VCO, blocking transient phase jitter before it can destabilize the PLL output while allowing legitimate tracking adjustments to proceed
3Adaptability or versatility
If the system accepts all phase detector outputs, then the PLL responds to all phase differences, but this includes transient phase jitter from ESD, alpha rays, and switching events
Solution Approach 1:
The system applies different quality control to different phase differences: small phase differences within the threshold are accepted and processed normally, while large phase differences exceeding the threshold are rejected. This local quality approach allows the system to maintain adaptability for legitimate phase tracking while providing specialized filtering for harmful transient jitter
Data Source
AI summary
A pulse limiter circuit of a phase-locked loop (PLL) receives, from a phase frequency detector of the PLL, first second input pulses, where pulse widths of the first and second input pulses indicate whether a reference clock signal leads or lags a feedback clock signal. The pulse limiter circuit determines whether a pulse width of the first or second input pulse is greater than a selected duration indicative of transient phase jitter. Based on determining the pulse width of the first or second input pulse is greater than the selected duration, the pulse limiter circuit sets a pulse width of a first output pulse equal to a pulse width of a second output pulse width and outputs the first and second output pulses to a charge pump of the PLL, such that no phase adjustment to the feedback clock signal is made based on the first and second input pulses.