PLL Pulse Repeater Circuit for Larger Phase Error Detection
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Solution Overview
Problem
Conventional Phase Locked Loop (PLL) circuitry has limited gain due to circuit topology and signal frequencies, leading to deterioration in noise performance and increased sensitivity to analog non-idealities, making it difficult to detect larger phase errors before saturation.
Innovation Solution
The introduction of a pulse repeater circuit that generates a second pulse signal by repeating the first pulse signal, allowing for increased gain control of the phase detector output signal, thereby improving noise performance and sensitivity, and enabling detection of larger phase errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional PLL circuitry is used with standard phase detector topology, then the circuit structure is simple, but the gain is limited leading to deterioration in noise performance
Solution Approach 1:
A pulse repeater circuit is introduced as an intermediary component between the phase detector and the feedback path. This pulse repeater takes the pulse signal from the phase detector and generates repeated pulses, effectively amplifying the control signal without requiring changes to the core PLL topology. The pulse repeater acts as a mediator that boosts the signal gain while maintaining the simplicity of the overall circuit structure.
Solution Approach 2:
The gain enhancement function is segmented from the main PLL circuitry and implemented as a separate pulse repeater module. This segmentation allows the pulse repetition function to be independently optimized and controlled, improving noise performance without complicating the overall PLL design. The segmented approach enables modular implementation where the pulse repeater can be added or adjusted without redesigning the entire PLL system.
2Measurement precision
If conventional phase detector with fixed topology is used, then the device complexity is low, but sensitivity to analog non-idealities increases
Solution Approach 1:
The pulse repeater circuit introduces dynamic pulse generation based on the phase detector output. Instead of a fixed gain structure, the pulse repeater dynamically generates multiple pulse copies whose number and timing can be adjusted. This dynamic approach enhances sensitivity to phase errors while maintaining a relatively simple phase detector structure, as the complexity is shifted to the adaptive pulse repetition mechanism rather than the phase detector itself.
3Adaptability or versatility
If standard pulse signal from phase detector is used, then the circuit operation is straightforward, but the phase error detection range is limited before saturation
Solution Approach 1:
The pulse repeater circuit employs periodic pulse generation where each input pulse from the phase detector is repeated multiple times at regular intervals. This periodic repetition extends the effective phase error detection range by providing multiple measurement opportunities within each phase error cycle. The periodic action allows the system to detect larger phase errors without saturation, as the repeated pulses provide cumulative information about the phase difference while adding only moderate processing complexity.
Data Source
AI summary
Phase Locked Loop, PLL, circuitry comprising a phase detector configured to generate a first pulse signal comprising at least one first pulse, a property of each first pulse being indicative of a phase difference between a reference signal and a feedback signal; a pulse repeater circuit configured, based on the first pulse signal, to generate a second pulse signal comprising, for each first pulse, a second pulse generated by repeating the corresponding first pulse; and an oscillator configured to generate the feedback signal and control a frequency of the feedback signal based on the second pulse signal.