PLL Charge Pump PWM Calibration for Stable Loop Bandwidth

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Phase-locked loops (PLLs) face challenges in bandwidth stabilization and tracking due to variations in supply voltage, temperature, and process variations, leading to uncertainty in VCO gain and charge pump current, which affects phase noise, spur performance, and lock time.

Innovation Solution

Incorporating a bandwidth calibration circuit that adjusts the charge pump gain by modifying the pulse width, transconductance, or slew rate of the feedback signal, allowing the PLL to automatically optimize its bandwidth and maintain accurate phase lock in varying conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If the charge pump current is increased to reduce phase noise, then phase noise performance is improved, but power consumption increases and spur performance deteriorates due to increased sensitivity to process and temperature variations

Engineering Contradiction:
Improvephase noiseVSAvoidpower consumption
Core Design Contradiction:
Object-affected harmful factorsVSUse of energy by moving object

Solution Approach 1:

The patent implements a bandwidth calibration circuit that dynamically adjusts the charge pump current based on detected bandwidth conditions. The circuit monitors the PLL bandwidth and automatically calibrates the charge pump current to optimal levels, transforming the static charge pump design into a dynamic one that adapts to changing conditions. This resolves the contradiction by enabling low current (low power) operation when bandwidth is sufficient, while providing current increase only when needed for phase noise reduction.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operating parameters of the charge pump by introducing a calibration mechanism that adjusts the charge pump current as a variable parameter. The bandwidth calibration circuit modifies the current level based on detected performance metrics, allowing the system to optimize the trade-off between phase noise reduction and power consumption. This parameter change approach enables the system to operate at minimal necessary current levels rather than fixed high current.

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If the charge pump current is increased to improve phase noise, then phase noise performance is improved, but spur performance deteriorates due to increased sensitivity to process and temperature variations

Engineering Contradiction:
Improvephase noiseVSAvoidspur performance
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent implements a feedback mechanism through the bandwidth calibration circuit that monitors PLL performance and adjusts the charge pump current accordingly. The circuit detects bandwidth conditions and feeds this information back to the charge pump control, creating a closed-loop system. This feedback approach prevents excessive current increase that would harm spur performance while ensuring sufficient current for phase noise reduction, thereby resolving the contradiction between these two performance metrics.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent transforms the static charge pump current design into a dynamic one by introducing calibration circuitry that adjusts current based on real-time bandwidth conditions. This dynamic adjustment allows the system to maintain optimal spur performance by avoiding unnecessary current increases, while still providing enhanced phase noise performance when conditions require it. The dynamic nature of the design prevents the degradation of spur performance associated with fixed high-current operation.

Inventive Principle:
Principle #15Dynamics

3Loss of time

If the bandwidth is widened to improve lock time, then lock time is reduced, but phase noise performance deteriorates due to increased VCO gain uncertainty

Engineering Contradiction:
Improvelock timeVSAvoidphase noise
Core Design Contradiction:
Loss of timeVSObject-affected harmful factors

Solution Approach 1:

The patent implements a dynamic bandwidth calibration system that adjusts the loop bandwidth based on detected conditions. During acquisition, the circuit allows wider bandwidth for faster lock time. Once locked, the calibration circuit narrows the bandwidth to reduce phase noise. This dynamic bandwidth adjustment resolves the contradiction by providing wide bandwidth temporarily when needed for fast locking, then transitioning to narrow bandwidth for optimal phase noise performance.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies preliminary action by pre-calibrating the bandwidth and charge pump current before full operation begins. The calibration circuit prepares optimal parameters in advance based on initial conditions, allowing the PLL to achieve fast lock without subsequently requiring bandwidth widening that would harm phase noise. This preliminary optimization resolves the contradiction by establishing appropriate parameters before the lock process begins.

Inventive Principle:
Principle #10Preliminary action

4Device complexity

If fixed bandwidth design is used to simplify the circuit, then device complexity is reduced, but bandwidth stabilization deteriorates due to supply voltage and temperature variations

Engineering Contradiction:
Improvecircuit complexityVSAvoidbandwidth stabilization
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The patent implements a self-service mechanism where the bandwidth calibration circuit automatically detects and corrects bandwidth drift caused by supply voltage and temperature variations. The circuit monitors the PLL operation and self-adjusts the bandwidth parameters without external intervention. This self-calibrating approach resolves the contradiction by providing automatic bandwidth stabilization through relatively simple calibration logic, avoiding the need for complex manual compensation circuits while maintaining stability under varying conditions.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent introduces parameter changes by making the bandwidth characteristics variable rather than fixed. The calibration circuit adjusts bandwidth parameters in response to detected conditions, allowing the system to adapt to supply voltage and temperature variations. This parameter change capability provides bandwidth stabilization without requiring complex circuitry, as the adjustment is achieved through controlled modification of existing parameters rather than adding complex stabilization mechanisms.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10855292B2Phase locked loop
Publication Date: 2020.12.01 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10855292B2 patent drawing
  • US10855292B2 patent drawing
  • US10855292B2 patent drawing

AI summary

Phase-locked loops (PLLs) are provided. A PLL includes a voltage-controlled oscillator (VCO), a frequency divider, a track-and-hold charge pump, and a frequency tracking circuit. The VCO is configured to provide an output clock corresponding to a pumping current. The frequency divider is configured to divide the output clock to provide a feedback signal. The track-and-hold charge pump is configured to provide the pumping current according to a reference clock and the feedback signal. The frequency tracking circuit is configured to decrease frequency error between the feedback signal and the reference clock. The track-and-hold charge pump includes a pumping switch and a pulse width modulator (PWM). The PWM is configured to provide a PWM signal to control the pumping switch according to the reference clock, so as to provide the pumping current corresponding to the feedback signal.