PLL Radar Chirp Generation With Loop Gain Calibration

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Solution Overview

Problem

Existing frequency-modulated continuous-wave (FMCW) radar systems are not robust against external perturbations and variations, affecting the reliability of generated radar transmitter signals.

Innovation Solution

A Phase Locked Loop (PLL) circuitry with a controllable oscillator and calibration circuitry is used to generate a frequency modulated radar transmitter signal, which includes a modulation signal generator, phase detector, and controllable frequency divider, ensuring the frequency modulation is robust across varying frequencies and ambient conditions by maintaining constant loop gain through calibration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional frequency modulation circuitry is used to generate FMCW radar signals, then the circuit can be simple in structure, but the generated signal is not robust against external perturbations and variations

Engineering Contradiction:
Improverobustness of frequency modulated signalVSAvoidcomplexity of circuitry structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a Phase Locked Loop (PLL) circuit that uses feedback mechanisms to continuously monitor and adjust the frequency of the voltage-controlled oscillator. The phase detector compares the oscillator output with a reference signal and generates error signals that are fed back to correct frequency deviations, thereby ensuring robust frequency modulation against external perturbations and variations.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent employs calibration circuitry that dynamically adjusts circuit parameters (such as capacitor values or resistor ratios) to compensate for environmental variations and manufacturing tolerances. This parameter adjustment ensures that the loop gain remains constant and the frequency modulation characteristics remain stable across different operating conditions.

Inventive Principle:
Principle #35Parameter changes

2Speed

If fast frequency modulation with short chirp time is used, then the beat frequency is increased, but the system becomes more sensitive to frequency variations and perturbations

Engineering Contradiction:
Improvechirp rate / beat frequencyVSAvoidstability against frequency variations
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The PLL circuit provides continuous feedback control that actively compensates for frequency variations even during fast chirp modulation. The phase detector and loop filter work together to rapidly correct frequency deviations, maintaining signal stability despite the high modulation rates associated with fast frequency modulation and short chirp times.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent uses a voltage-controlled oscillator whose frequency can be dynamically adjusted in real-time according to the modulation signal while the PLL maintains phase coherence. This dynamic control allows the system to achieve fast frequency modulation with short chirp times while maintaining robustness through continuous phase locking and error correction.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a robust frequency modulated radar transmitter signal that is resilient to frequency changes and environmental variations, ensuring consistent performance across the frequency range, thereby enhancing the reliability of FMCW radar systems.

Implementation Method 1

a phase detector, arranged to generate a control voltage in dependence of a phase difference between a feedback signal and the reference signal

Methodology Applied
Scientific EffectPhase detection:

Implementation Method 2

a controllable oscillator, arranged to generate a signal at an oscillator output in dependence of a control voltage

Methodology Applied
Scientific EffectVoltage-controlled oscillation:

Implementation Method 3

a controllable frequency divider, arranged to generate a feedback signal from the generated signal at the oscillator output, the feedback signal having a frequency being substantially equal to a frequency of the generated signal at the oscillator output divided by a controllable factor

Methodology Applied
Scientific EffectFrequency division:

Implementation Method 4

ensuring the frequency modulation is robust across varying frequencies and ambient conditions by maintaining constant loop gain through calibration

Methodology Applied
Scientific EffectLoop gain stabilization:

Data Source

PatentUS9720074B2Circuitry for and method of generating a frequency modulated radar transmitter signal, a radar transceiver circuit and a radar system
Publication Date: 2017.08.01 NXP USA INC
  • US9720074B2 patent drawing
  • US9720074B2 patent drawing
  • US9720074B2 patent drawing

AI summary

A circuitry for and a method of generating a frequency modulated radar transmitter signal are provided. The circuitry comprises a modulation signal generator for generating a modulation signal having a waveform describing a required frequency modulation of the frequency modulated radar transmitter signal and comprises a PLL circuitry for generating the frequency modulated radar transmitter signal in dependence of the modulation signal. In the PLL circuitry a controllable frequency divider controls the output frequency of the PLL circuitry in dependence of the modulation signal. The PLL circuitry further comprises a phase detector, a controllable oscillator and possibly a low pass filter. The PLL circuitry further comprises a calibration circuitry being configured to control a parameter of at least one of the phase detector and the controllable oscillator to maintain a loop gain of PLL circuitry.