PLL Reset Control Circuit for Faster Voltage Stabilization
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Solution Overview
Problem
Functional circuits, such as phase locked loop circuits, experience excessive setting time due to unstable output voltage during initialization, requiring a prolonged time for stabilization.
Innovation Solution
A control circuit comprising a reset circuit and a determination circuit that performs a reset operation on a digital circuit and determines whether a predetermined time interval has elapsed to stop the reset operation, ensuring the analog circuit stabilizes before ceasing the reset, thereby optimizing the setting time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the functional circuit is initialized without reset control, then the circuit can start operating, but the output voltage remains unstable during time interval T11 requiring excessive setting time
Solution Approach 1:
The reset circuit performs a reset operation on the digital frequency divider before the phase locked loop circuit starts operating. This preliminary action clears any unstable state in the digital circuit, ensuring that when the circuit begins operation, the output voltage stabilizes quickly without requiring the excessive setting time (T11 + T12) that would otherwise be needed.
Solution Approach 2:
The determination circuit monitors the output voltage of the phase locked loop circuit and detects when it becomes stable. Based on this feedback, the control circuit automatically stops the reset operation at the appropriate moment. This feedback mechanism ensures the output voltage stability is achieved while minimizing the reset duration, thus reducing the overall setting time.
2Reliability
If the reset operation is performed continuously, then the digital circuit remains stable, but the setting time is excessively long due to waiting for analog circuit stabilization
Solution Approach 1:
The determination circuit provides real-time feedback by monitoring whether the output voltage has become stable. The control circuit uses this feedback to automatically terminate the reset operation at the optimal moment, rather than running it continuously or for a fixed extended period. This resolves the contradiction by maintaining digital circuit stability through targeted reset operations while significantly improving productivity by eliminating unnecessary wait time for analog circuit stabilization.
Solution Approach 2:
The system uses its own output voltage stability status to control the reset operation. The determination circuit detects when the output voltage becomes stable, and this self-detected information is used to automatically stop the reset operation. This self-service mechanism ensures digital circuit stability is maintained precisely when needed, while allowing the system to efficiently transition to normal operation without external intervention or excessive delays.
Data Source
AI summary
A control circuit includes a reset circuit and a determination circuit. The reset circuit is coupled to a digital frequency divider of a phase locked loop circuit and configured to perform a reset operation. The determination circuit is coupled to the reset circuit and configured to determine whether a first predetermined time interval has elapsed so as to control the reset circuit to stop performing the reset operation when the first predetermined time interval has elapsed.