PLL Sample and Hold Circuit for Noise Nulling
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Solution Overview
Problem
Phase lock loop circuits face challenges in managing clock frequency due to the generation of spurs and the need for large capacitors, which result in slow operation and increased space requirements, while existing noise suppression methods constrain bandwidth and increase design complexity.
Innovation Solution
Incorporating a sample and hold circuit with two capacitors and switches between the oscillation control source and the controllable oscillator, which introduces a transfer function with a sin x/x characteristic and a null at the switch frequency, reducing noise exposure to the voltage controlled oscillator without increasing passive element values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If large value capacitors are used in the loop filter to reduce ripple on control voltage, then ripple suppression is improved, but operation speed decreases and space requirements increase
Solution Approach 1:
The patent divides the single large capacitor into multiple smaller capacitors (first capacitor and second capacitor) connected in parallel. This segmentation achieves the same total capacitance value for ripple suppression while reducing the physical size of individual capacitors and allowing faster charging/discharging responses, thus improving operation speed without sacrificing ripple suppression capability.
2Object-affected harmful factors
If large value capacitors are used in the loop filter to reduce ripple on control voltage, then ripple suppression is improved, but device area increases
Solution Approach 1:
The patent segments the total capacitance into multiple smaller capacitor units that can be arranged in a more compact configuration. The parallel connection of smaller capacitors achieves the same total capacitance value with reduced individual component sizes and better space utilization, thereby reducing overall device area while maintaining effective ripple suppression.
3Object-affected harmful factors
If traditional loop filter design is used to suppress spurs from charge pump, then noise reduction is achieved, but bandwidth is constrained and design complexity increases
Solution Approach 1:
The patent introduces dynamic elements (switches) that can selectively connect or disconnect capacitor portions based on operating conditions. This dynamic configuration allows the loop filter to adapt its characteristics, providing effective noise and spur suppression while maintaining flexible bandwidth control and reducing design complexity through programmable or state-dependent operation.
Solution Approach 2:
The patent enables change in capacitor effective values by selectively connecting different capacitor combinations through switches. This parameter change capability allows optimization of the loop filter for different operating modes, achieving effective noise suppression across varying bandwidth requirements without increasing design complexity, as the same physical components can be reconfigured for different performance targets.
Data Source
AI summary
Various systems and methods for clock management. As one example, a system for clock management is disclosed that includes a controllable oscillator, an oscillation control source, and a sample and hold circuit. The sample and hold circuit is disposed between the oscillation control source and the controllable oscillator, and is operable to introduce a transfer function having a sin x/x characteristic with a null at a switch frequency applied to the sample and hold circuit.