PLL Self-Test Reconfiguration for On-Chip Frequency Measurement
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Solution Overview
Problem
The high cost and time-consuming nature of testing and characterizing phase-locked loops (PLLs) using external test equipment, which increases production time and costs, and existing on-chip solutions that mimic external test equipment often consume significant chip area and power.
Innovation Solution
A phase-locked loop system with built-in self-test (BIST) functionality that reconfigures to operate in two modes: a normal mode for frequency synthesis and a test mode for characterization, using PLL elements like adders, filters, and oscillators to determine the oscillating frequency without dedicated BIST counters or external equipment, allowing for faster and more accurate testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external test equipment is used to test and characterize phase-locked loops, then measurement accuracy can be achieved, but production time increases and costs increase
Solution Approach 1:
The PLL device performs self-testing and self-characterization using built-in test circuitry integrated on the same chip. The test controller generates test signals, configures the PLL in test mode, and measures its own performance parameters without requiring external test equipment, thereby reducing production time while maintaining measurement accuracy
Solution Approach 2:
The PLL circuit is designed to operate in multiple modes including normal operating mode and test mode. The same PLL components (oscillator, phase detector, loop filter) serve dual purposes: frequency synthesis during normal operation and self-characterization during test mode, eliminating the need for separate dedicated test equipment
2Measurement precision
If external test equipment is used to characterize phase-locked loops, then accurate frequency measurement can be obtained, but production costs increase
Solution Approach 1:
The PLL device performs self-testing and self-characterization using built-in test circuitry integrated on the same chip. The test controller generates test signals, configures the PLL in test mode, and measures its own performance parameters without requiring external test equipment, thereby reducing production time while maintaining measurement accuracy
Solution Approach 2:
The test controller and measurement circuitry are merged with the PLL functional blocks on the same chip. The phase detector, loop filter, and oscillator are reused for both normal PLL operation and test mode characterization, eliminating the need for separate dedicated test equipment and reducing overall system cost
3Productivity
If on-chip BIST circuitry is implemented to test PLLs, then production time is reduced, but chip area consumption increases
Solution Approach 1:
The PLL circuit is designed to operate in multiple modes including normal operating mode and test mode. The same PLL components (oscillator, phase detector, loop filter) serve dual purposes: frequency synthesis during normal operation and self-characterization during test mode, eliminating the need for separate dedicated test equipment
Solution Approach 2:
The test controller and measurement circuitry are merged with the PLL functional blocks on the same chip. The phase detector, loop filter, and oscillator are reused for both normal PLL operation and test mode characterization, eliminating the need for separate dedicated test equipment and reducing overall system cost
Data Source
AI summary
A chip includes a phase-locked loop (PLL) and a test controller. The PLL includes an oscillator and a phase detector. In a normal mode, a first feedback loop includes a phase detector and an oscillator that generates an output based on a frequency input signal. In a test mode, the PLL is re-configured. The output of the loop filter can be decoupled from the input of the oscillator in the test mode and instead be coupled to the input of the phase detector. The oscillator can receive a test tuning signal provided by the test controller. In this test mode configuration, the PLL can measure the frequency of the oscillator.