PLL Settling Time Measurement Using Mixed-Signal Threshold Detection

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Solution Overview

Problem

Current methods for testing the settling time of phase-locked loops (PLLs) and transceivers are inaccurate due to sampling errors from time quantization, leading to the acceptance of defective components and rejection of good ones, and reducing the intermediate frequency to improve accuracy prolongs testing time.

Innovation Solution

A method and system that activate a device-under-test (DUT) to generate an output signal, mix it with a reference signal of equal frequency, and determine settling time based on the amplitude threshold crossing in the mixed signal, which settles to a DC signal, with an optional fast-Fourier transform to adjust for frequency errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the intermediate frequency is decreased to improve measurement precision, then the accuracy of zero-crossing testing is improved, but the testing time is prolonged

Engineering Contradiction:
Improveaccuracy of settling time measurementVSAvoidtesting time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent replaces the traditional zero-crossing detection method with a peak detection method in the frequency domain. Instead of measuring zero-crossings in the time domain (which requires low intermediate frequencies for accuracy), the invention transforms the mixed signal to baseband, extracts the in-phase (I) and quadrature (Q) components, and detects the peak of the resulting spectrum. This substitution allows accurate settling time measurement at higher intermediate frequencies, thus resolving the contradiction between measurement precision and testing time.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Ease of operation

If the traditional zero-crossing averaging method is used, then the testing process is simplified, but sampling errors and measurement inaccuracies occur

Engineering Contradiction:
Improvesimplicity of testing methodVSAvoidaccuracy of settling time measurement
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent introduces intermediate signals (I and Q components) as mediators between the original mixed signal and the final settling time measurement. By transforming the mixed signal through mixing with cosine and sine reference signals, the invention creates I and Q components that, when combined and transformed, provide an accurate representation of the settling behavior without suffering from zero-crossing sampling errors. This intermediary approach maintains operational simplicity while dramatically improving measurement accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the settling time specification testing is performed with high accuracy requirements, then defective components are properly identified, but the testing efficiency is reduced

Engineering Contradiction:
Improveaccuracy of component acceptance/rejectionVSAvoidtesting efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent changes the measurement parameter from time-domain zero-crossing intervals to frequency-domain peak detection. By transforming the problem into the frequency domain through Fourier transformation of the I and Q components, the invention achieves high accuracy in settling time measurement without the sampling errors inherent in time-domain methods. This parameter change enables reliable identification of defective components while maintaining high testing efficiency, as the peak detection method is both accurate and computationally efficient.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach provides accurate and efficient determination of settling time, reducing errors in component testing and ensuring compliance with specifications, thereby improving the quality control of PLLs and transceivers.

Implementation Method 1

mixing the output signal of the DUT and a reference signal to generate a mixed signal

Methodology Applied
Scientific EffectMixing: Heterodyne

Data Source

PatentUS7646204B2Method and system for testing a settling time for a device-under-test
Publication Date: 2010.01.12 TEXAS INSTRUMENTS INC
  • US7646204B2 patent drawing
  • US7646204B2 patent drawing
  • US7646204B2 patent drawing

AI summary

A system and method are disclosed for testing a settling time of a device-under-test (DUT). A method for determining a settling time of a device-under-test (DUT) includes activating a DUT to generate an output signal and mixing the output signal of the DUT and a reference signal to generate a mixed signal. An amplitude threshold is set for the mixed signal relative to an amplitude of the mixed signal and the settling time of the DUT is determined based on a last time that the amplitude of the mixed signal crosses the amplitude threshold relative to the activation of the DUT.