Phase-Locked Loop Simulator Using Segmented Noise Vectors
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Solution Overview
Problem
Current simulation tools for phase-locked loops (PLLs) are inefficient in generating phase noise and jitter due to the complex, non-linear behavior of PLL circuits, requiring lengthy transient simulations and facing numerical issues with frequency divider ratios, making it time-consuming to capture start-up and locking phases accurately.
Innovation Solution
A method and simulator that classify simulation blocks into master, semi-master, and slave elements, generating predefined noise vectors using inverse Fast Fourier Transform (IFFT) and post-processing to produce time domain noise vectors, allowing for faster and more accurate simulation of phase noise and jitter in PLL systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If transient simulation is used to capture start-up and locking phases of PLL, then accuracy of phase noise characterization is improved, but simulation time becomes excessively long
Solution Approach 1:
The simulation blocks are segmented into master element blocks (oscillators) and slave element blocks (other PLL components). This segmentation allows the complex PLL system to be divided into manageable parts where only the master blocks require detailed transient simulation for noise generation, while slave blocks can use simplified models, thereby reducing overall simulation time while maintaining accuracy where needed.
Solution Approach 2:
Predefined noise vectors are generated in advance using inverse Fast Fourier Transform (IFFT) of phase noise spectral density. This preliminary action creates ready-to-use noise sequences that can be directly applied to master element blocks during simulation, eliminating the need for lengthy transient simulations to capture noise characteristics, thus significantly reducing simulation time while preserving accuracy.
2Measurement precision
If detailed transient simulation is performed to accurately capture PLL behavior, then noise and jitter characterization precision is improved, but computational complexity increases
Solution Approach 1:
The simulation architecture is segmented into master element blocks that generate noise and slave element blocks that receive noise. This segmentation simplifies the overall simulation complexity by allowing independent treatment of different blocks, where complex transient analysis is only performed where necessary (master blocks), while slave blocks use simpler models.
Solution Approach 2:
Predefined noise vectors serve as intermediaries between the phase noise spectral density specification and the time-domain simulation. These noise vectors act as a mediator that translates frequency-domain specifications into time-domain signals that can be directly applied to master element blocks, simplifying the simulation process while maintaining precision.
3Measurement precision
If conventional simulation methods are used for PLL systems, then comprehensive noise analysis is achieved, but simulation efficiency deteriorates
Solution Approach 1:
Phase noise spectral density is converted into predefined noise vectors using inverse Fast Fourier Transform (IFFT) before the main simulation. This preliminary action prepares the noise data in advance, allowing efficient time-domain simulation without requiring lengthy transient analysis, thus improving simulation efficiency while maintaining comprehensive noise analysis capability.
Solution Approach 2:
The conventional mechanical transient simulation approach is replaced with a more efficient method using predefined noise vectors and behavioral models. Instead of relying on computationally intensive transient simulation to capture noise, the invention substitutes this with a pre-processing step (IFFT) that generates noise vectors, followed by efficient time-domain simulation, thereby dramatically improving productivity.
Data Source
AI summary
A method and simulator for generating phase noise in a system with a phase-locked loop (PLL) are disclosed. Each simulation block of the system with the PLL has its own predefined phase noise vector whose elements are injected consecutively at a trigger event. An element selection of the predefined noise vector of is steered from the master element block, which is usually the voltage or current-controlled oscillator. Some simulation blocks, called semi-master element blocks, are self-triggered and determines their own injection frequency rates, and are reset-steered and aligned with the master element block as a capturing data phase starts; while other simulation blocks, called slave element blocks, are directly steered with the master element block.