PLL Slew-Rate Matching for Accurate Phase Detection
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Solution Overview
Problem
The existing PLL circuits in memory devices, such as HBM, face errors in clock signal generation due to differences in slew rates between reference and feedback clock signals, leading to phase deviation and erroneous operations.
Innovation Solution
Incorporating a slew-rate control unit within the phase frequency detector to adjust the slew rate of the reference clock signals to match that of the feedback clock signals, ensuring accurate phase and frequency detection by the PLL circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the reference clock signal is supplied directly to the phase frequency detector without slew rate adjustment, then the circuit complexity is reduced, but phase detection accuracy deteriorates due to slew rate mismatch
Solution Approach 1:
A slew rate control unit is introduced as an intermediary component between the reference clock signal source and the phase frequency detector. This unit adjusts the slew rate of the reference clock signal to match that of the feedback clock signal, enabling accurate phase detection without requiring complex external adjustment circuits.
Solution Approach 2:
The slew rate control unit dynamically adjusts the slew rate parameter of the reference clock signal based on the division ratio setting. When the division ratio changes, the slew rate control unit modifies the slew rate to compensate for the resulting mismatch, thereby maintaining detection accuracy across different operating conditions.
2Adaptability or versatility
If the division ratio in the feedback path is changed to adjust clock frequency, then frequency adaptability is improved, but slew rate mismatch increases causing phase detection errors
Solution Approach 1:
The system uses feedback from the division ratio setting to control the slew rate adjustment. The slew rate control unit receives the division ratio signal and automatically adjusts the reference clock slew rate accordingly, creating a closed-loop system that maintains phase detection reliability across different frequency configurations.
Solution Approach 2:
The slew rate control unit dynamically adjusts the slew rate parameter in real-time based on changes in the division ratio. This dynamic adaptation ensures that the reference clock signal always has the appropriate slew rate matching the feedback clock signal, regardless of frequency changes in the feedback path.
Data Source
AI summary
Disclosed herein is an apparatus that includes a phase frequency detector configured to compare a phase difference between first and second clock signals to generate a phase detection signal, and a slew rate controller configured to lower a slew rate of the first clock signal when a selection signal is in a first state.