PLL Loop Filter Split-Path Control for Lower Phase Noise
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Phase-locked loops (PLLs) face challenges in reducing noise and jitter, particularly due to the contribution of the loop stabilizing resistor, which, when reduced, requires increases in capacitance or VCO gain, leading to increased power consumption and area, making it difficult to maintain comparable loop dynamics.
Innovation Solution
The solution involves splitting the path between the charge pump output voltage and the voltage controlled oscillator frequency into two routes, using two nodes for voltage to current conversion, with one node producing a gain of KVCO×(M−1)/M and the other KVCO/M, allowing for reduced phase noise without altering other PLL metrics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If the loop stabilizing resistor value is reduced to reduce phase noise, then phase noise is reduced, but power consumption and area increase due to required increases in capacitance or VCO gain
Solution Approach 1:
The patent divides the single control voltage path into two separate paths: a proportional path and an integral path. Each path has its own voltage-to-current converter and can be independently optimized. This segmentation allows the system to achieve noise reduction without requiring uniform increases in all components, thereby avoiding the power consumption penalty.
Solution Approach 2:
The patent changes the gain distribution parameters between the proportional and integral paths by adjusting the ratio parameter M. By optimizing these parameter distributions, the system achieves reduced phase noise contribution from the loop filter resistor without requiring proportional increases in capacitance or VCO gain that would increase power consumption.
2Object-generated harmful factors
If the loop stabilizing resistor value is reduced to reduce phase noise, then phase noise is reduced, but area increases due to required increases in capacitance or VCO gain
Solution Approach 1:
The patent segments the control path into proportional and integral components, each with independent voltage-to-current converters. This allows selective optimization of each path's contribution to phase noise without requiring uniform scaling of all circuit elements, thereby containing the overall area increase.
Solution Approach 2:
By changing the gain distribution parameters (ratio M) between the two paths, the system achieves noise reduction through parameter optimization rather than through increasing component sizes, thus avoiding proportional area increases.
3Object-generated harmful factors
If the loop stabilizing resistor value is reduced to reduce phase noise, then phase noise is reduced, but loop dynamics deteriorate
Solution Approach 1:
The patent segments the control function into proportional and integral paths, allowing independent optimization of each path's transfer function. This enables the system to reduce phase noise in one path while maintaining loop dynamics through the other path, resolving the contradiction between noise reduction and stability.
Solution Approach 2:
The patent optimizes the gain distribution parameters between the two paths to achieve the desired phase noise reduction while maintaining stable loop dynamics. By carefully selecting the ratio parameter M and individual path gains, the system achieves both noise reduction and dynamic stability.
4Object-generated harmful factors
If the loop stabilizing resistor value is reduced to reduce phase noise, then phase noise is reduced, but power consumption increases
Solution Approach 1:
The patent segments the control path into two independent paths with separate voltage-to-current converters. This allows the system to reduce phase noise through optimized parameter distribution rather than through increasing power consumption, as each path can be independently tuned for efficiency.
Data Source
AI summary
A phase locked loop (PLL) includes: a phase frequency detector configured to: generate one or more comparison signals indicating whether a reference input signal is leading a feedback signal or whether the feedback signal is leading the reference input signal; a charge pump coupled to the phase frequency detector and configured to convert the one or more comparison signals into a driving current; a loop filter coupled to the charge pump and configured to split the driving current to generate a first voltage signal and a second voltage signal; and a voltage controlled oscillator coupled to the loop filter and configured to: receive the first voltage signal and generate a first control current; receive the second voltage signal and generate a second control current; and combine the first and second control currents to jointly drive a charge controlled oscillator such that the output signal of a desired frequency is generated.