PLL Start-Up Control Using Adaptive Pre-Charge Current
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Solution Overview
Problem
Phase-locked loop (PLL) circuits in digital systems face long and variable start-up durations due to temperature and manufacturing process variations, which are critical for low power products requiring stable and reproducible clock signals.
Innovation Solution
A process that adjusts the intensity of the pre-charge current in a PLL circuit based on the time variation of the output frequency, using a reference time variation defined in simulation, to stabilize and shorten the start-up duration, while also reducing frequency overshoot by employing a reference signal with a 50% duty cycle and resetting the loop divider at specific edges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the PLL circuit uses a feedback loop and capacitive network for stability, then the loop stability is improved, but the start-up duration becomes very long (greater than 100 μs)
Solution Approach 1:
The patent applies preliminary action by pre-charging the capacitive network before the normal PLL operation begins. A pre-charge current is applied to the capacitors in the feedback loop's capacitive network during a start-up phase, preparing them in advance so that when the PLL enters normal operation, the capacitors are already charged and the loop can lock quickly without the long charging delay that would otherwise occur.
2Use of energy by moving object
If the start-up duration is reduced for low power products, then the power consumption is improved, but the start-up duration becomes sensitive to temperature and manufacturing variations
Solution Approach 1:
The patent implements feedback by monitoring the output frequency of the voltage-controlled oscillator during the start-up phase and using this information to dynamically adjust the pre-charge current. A frequency detector measures the output frequency, and based on this measurement, the pre-charge current is regulated to maintain a target frequency slope. This closed-loop feedback ensures that the start-up duration remains stable and reproducible across different temperatures and manufacturing variations, while still being short enough for low-power applications.
3Speed
If the pre-charge current intensity is increased to shorten start-up duration, then the start-up speed is improved, but the frequency overshoot increases
Solution Approach 1:
The patent applies dynamics by making the pre-charge current adaptive rather than fixed. The pre-charge current intensity is dynamically adjusted based on the measured output frequency and its slope. The system regulates the pre-charge current to maintain a target frequency slope, automatically reducing the current if the slope is too steep (which would cause overshoot) and increasing it if the slope is too gentle (which would slow start-up). This dynamic adjustment optimizes both start-up speed and frequency overshoot control.
Data Source
AI summary
A start-up phase of a phase lock loop (PLL) circuit includes supplying, by a phase comparator, of control pulses during which an output signal frequency of an oscillator increases. The increase includes an application of a pre-charge current at the oscillator input. A determination is made of a time variation of the output signal frequency. At least one adjustment is made of the intensity of the pre-charge current depending on the at least one determined time variation so as to approach a reference time variation.