PLL Switch Assembly With LO Feedback for Linear Frequency Ramps
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Solution Overview
Problem
Circuit arrangements for generating high-frequency output signals forming a broadband frequency ramp face challenges in achieving linearity due to variations in ring gain and tuning slope, leading to poor regulation and interference suppression, especially in the millimeter wave range.
Innovation Solution
The introduction of a reverse layer mixer in the phase-locked loop compensates for variations in the division factor, stabilizing the voltage-controlled oscillator over a wide frequency range by adjusting the local oscillator frequency, which is preferably higher than the input signal frequency, and implementing integrated LC resonator elements for cost-effectiveness and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the division ratio of the frequency divider is varied to adjust the output frequency, then the frequency range is expanded, but the ring gain varies causing poor regulation and interference suppression
Solution Approach 1:
The patent introduces a feedback mechanism where the local oscillator frequency is adjusted based on the division ratio changes. The feedback path includes a second frequency divider that divides the local oscillator signal, and a phase detector that compares this divided signal with a reference signal. When the division ratio of the first frequency divider changes, the feedback mechanism automatically adjusts the local oscillator frequency to compensate, thereby maintaining constant ring gain and ensuring stable regulation and interference suppression across the entire frequency range.
2Adaptability or versatility
If the VC oscillator tuning slope varies with frequency, then the frequency coverage is increased, but the linearity of the output frequency ramp deteriorates
Solution Approach 1:
The patent changes the parameter of the local oscillator frequency dynamically to compensate for the varying tuning slope of the VC oscillator. As the VC oscillator's tuning slope decreases at higher frequencies, the feedback mechanism increases the local oscillator frequency proportionally. This parameter change in the local oscillator frequency counteracts the non-linearity introduced by the VC oscillator, resulting in a linear overall frequency ramp across the extended frequency coverage.
3Device complexity
If a fixed frequency divider is used in the PLL, then the circuit complexity is reduced, but the frequency adjustment flexibility is limited
Solution Approach 1:
The patent implements a dynamic frequency divider with a variable division ratio controlled by digital signals. Instead of using a fixed frequency divider, the invention employs a programmable frequency divider whose division ratio can be changed via control signals from a microcontroller or digital logic circuit. This dynamic approach allows flexible frequency adjustment across a wide range while maintaining relatively simple circuit architecture, as the frequency tuning is achieved through digital control rather than complex analog circuitry.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach achieves improved linearity of high-frequency output signals and stabilizes the VC oscillator across a wide frequency range, enhancing control characteristics and reducing phase noise, particularly in the millimeter wave range, while minimizing power consumption and costs.
Implementation Method 1
the down-converter mixes the output signals and the local oscillator signal
Data Source
Figure 1
Figure 2a~2b
Figure 3
AI summary
The circuit arrangement comprises a reference oscillator (1), a phase detector (2), a loop filter (3), a voltage-controlled oscillator (4), a down mixer (7), a frequency divider (5) and a local oscillator (8) for generation of a local oscillator signal. The reference oscillator is also provided for a phase-locked loop. The characteristic curve of the output signals is improved by adjusting the frequency of the local oscillator signals.