PLL Signal Control with Switchable Integrators for Fast Transitions
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Solution Overview
Problem
Signal control systems, such as RF signal control systems, face delays in adjusting the frequency or amplitude of oscillating signals due to programming and settling requirements, which are affected by temperature, noise, and system changes.
Innovation Solution
The implementation of switchable integrators and a controller that switches between narrow and wide bandwidth modes, along with a pre-tune circuit, allows for rapid frequency and amplitude adjustments by programming the frequency divider and automatic level controllers while the phase-locked loop is open, reducing settling and programming delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the frequency or amplitude of an oscillating signal is changed by programming the frequency divider or automatic level controllers, then the signal parameters are adjusted, but programming and settling delays are incurred
Solution Approach 1:
The patent pre-charges capacitors in the integrators before switching between frequency or amplitude settings. This preliminary charging action prepares the integrators in advance, significantly reducing the settling delay that would otherwise occur when changing signal parameters through programming the frequency divider or automatic level controllers.
2Reliability
If the bandwidth of integrators is narrowed to mitigate phase noise and amplitude noise, then noise is reduced, but signal transition speed is slowed
Solution Approach 1:
The patent implements switchable integrators that can dynamically change their bandwidth characteristics. The integrators can switch between narrow bandwidth mode (for noise mitigation during steady-state operation) and wide bandwidth mode (for fast signal transitions during programming), allowing the system to optimize for either noise reduction or speed depending on the operational phase.
Data Source
AI summary
In one embodiment, a signal control system has a signal output and includes: 1) a phase-locked loop (PLL) having a voltage-controlled oscillator (VCO), a phase error detector, an oscillating output coupled to the signal output of the signal control system, and a programmable frequency divider coupled in a feedback path between the oscillating output and the phase error detector; 2) at least one automatic level controller (ALC), coupled to the oscillating output; and 3) a plurality of switchable integrators, including first and second switchable integrators that are respectively coupled between the phase error detector and the VCO, and in the at least one ALC. Each of the switchable integrators is switchable between a narrow bandwidth mode that provides for stable operation of the signal control system, and a wide bandwidth mode that enables fast signal transitions at the signal output.


