Phase-Locked Loop Control Circuit for Switching Power Converter Frequency Stabilization

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Solution Overview

Problem

Switching converters with constant off-time (COT) control experience frequency variations due to changes in input or output voltage, leading to electromagnetic interference and noise issues.

Innovation Solution

A control circuit for switching power converters incorporating a phase lock circuit to generate a second time signal, ensuring the switching signal frequency remains constant by comparing it with a reference clock signal, and utilizing a switching signal generating circuit to control the power switch based on this signal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If COT control is used to simplify circuit design and improve transient response, then device complexity is reduced and transient response is improved, but switching frequency varies causing electromagnetic interference and noise

Engineering Contradiction:
Improvecircuit design complexityVSAvoidelectromagnetic interference and noise
Core Design Contradiction:
Device complexityVSObject-generated harmful factors

Solution Approach 1:

The patent implements a phase-locked loop (PLL) control mechanism that continuously monitors the switching frequency and adjusts the switching cycle to maintain a constant frequency. The PLL compares the actual switching frequency with a reference frequency and generates correction signals to eliminate frequency deviations, thereby preventing electromagnetic interference and noise while preserving the simplified COT control architecture

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent dynamically adjusts the switching cycle parameters based on feedback from the PLL circuit. By changing the switching period while maintaining constant frequency, the system achieves both simplified circuit design and reduced electromagnetic interference. The on-time and off-time intervals are modulated to keep the overall switching frequency stable

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If COT control is used to omit external compensation network and error amplifier, then device complexity is reduced, but switching frequency stability deteriorates

Engineering Contradiction:
Improvecompensation network and error amplifierVSAvoidswitching frequency stability
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The PLL circuit provides continuous feedback control by comparing the actual switching frequency with the reference frequency and adjusting the switching cycle accordingly. This feedback mechanism ensures frequency stability without requiring external compensation networks or error amplifiers, as the PLL internally maintains the frequency lock

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system uses its own switching frequency as the input to the PLL, which then generates the control signals for the switching cycle. The circuit serves itself by using the switching frequency information to regulate its own operation, eliminating the need for external compensation components while maintaining frequency stability

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8928300B2Control circuits for switching power converters and associated methods
Publication Date: 2015.01.06 CHENGDU MONOLITHIC POWER SYST
  • US8928300B2 patent drawing
  • US8928300B2 patent drawing
  • US8928300B2 patent drawing

AI summary

The present application discloses a control circuit of a switching power converter, wherein the switching power converter comprises a power switch, and is configured to convert an input voltage into an output voltage, the control circuit comprises: a first time generating circuit configured to generate a first time signal; a phase lock circuit configured to generate a second time signal; and a switching signal generating circuit configured to generate a switching signal to control the ON and OFF switching of the power switch. The phase lock circuit generates the second time signal in accordance with the frequency difference between the switching signal and a reference clock signal, so as to get the frequency of the switching signal to be substantially equal to the frequency of the reference clock signal.