PLL TDC Calibration Using Open-Loop Output Distribution
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Solution Overview
Problem
The nonlinearity of Time-to-Digital Converters (TDCs) in Phase-Locked Loops (PLLs) introduces noise in control signals, degrading the quality of output signals, and conventional correction methods are influenced by the closed-loop transfer function, making precise correction challenging.
Innovation Solution
Operating the PLL in an open-loop mode during calibration to determine the nonlinearity of the TDC by generating a first signal with a frequency different from an integer multiple of the reference frequency, calculating corrections using a distribution of output values, and applying these corrections to reduce noise in the control signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional closed-loop mode is used to determine correction values for TDC output, then the PLL can maintain phase lock, but the correction values are influenced by the closed-loop transfer function which degrades correction precision
Solution Approach 1:
The patent applies preliminary action by performing TDC nonlinearity calibration in open-loop mode before normal closed-loop operation. A calibration mode is introduced where the PLL operates in open-loop to allow accurate measurement of TDC output distribution and determination of correction values without interference from the closed-loop transfer function. This preliminary calibration step establishes accurate correction data that can then be applied during normal operation.
Solution Approach 2:
The patent segments the PLL operation into distinct modes: a calibration mode operating in open-loop for determining correction values, and a normal mode operating in closed-loop for maintaining phase lock. This segmentation allows the correction determination process to be separated from the phase-locking function, enabling precise nonlinearity measurement without the complicating influence of the closed-loop transfer function.
2Reliability
If TDC nonlinearity correction is applied using closed-loop mode, then phase lock is maintained, but the correction is degraded by the closed-loop transfer function characteristics
Solution Approach 1:
The patent performs the nonlinearity measurement and correction determination as a preliminary action in open-loop calibration mode before entering closed-loop operation. This allows accurate characterization of TDC nonlinearity without the distorting effect of the closed-loop transfer function, while phase lock stability is maintained during normal operation through separate closed-loop control.
Solution Approach 2:
The patent segments the measurement and control functions by performing nonlinearity calibration in open-loop mode separate from the closed-loop phase-locking operation. This segmentation enables independent optimization of measurement accuracy (in open-loop) and phase lock stability (in closed-loop) without mutual interference.
3Measurement precision
If open-loop mode is used for TDC calibration, then accurate correction values can be determined free from closed-loop influence, but the PLL cannot maintain phase lock during calibration
Solution Approach 1:
The patent performs TDC calibration in open-loop mode as a preliminary action before normal operation. During this calibration phase, the PLL intentionally operates in open-loop to allow accurate measurement of TDC output distribution and determination of correction values. After calibration is complete, the system transitions to closed-loop mode to maintain phase lock during normal operation, thus sacrificing temporary phase lock stability for the purpose of achieving accurate correction data.
Data Source
AI summary
A system for determining a correction for an output value of a time-to-digital converter within a phase-locked loop is provided. The output value relates to a time difference between an input signal and a reference signal supplied to the time-to-digital converter. The system includes a digitally-controlled oscillator configured to generate a first signal independently from the output signal. The first signal has a first frequency different from an integer multiple of a reference frequency of the reference signal. The system further includes a frequency divider configured to generate the input signal for the time-to-digital converter based on the first signal. The input signal has a second frequency being a fraction of the first frequency. Further, the system includes a processing unit configured to calculate the correction using a distribution of output values of multiple time differences.