PLL Temperature Compensation With Coarse and Fine VCO Tuning

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Solution Overview

Problem

Conventional phase lock loops (PLLs) fail to maintain output frequency stability due to temperature variations, as capacitance changes with temperature, leading to inadequate control over tuning digital values and voltage for varactors, resulting in frequency drift.

Innovation Solution

A phase lock loop system that includes a voltage-controlled oscillator (VCO) with multiple capacitors and a temperature compensator using a lookup table to adjust tuning digital values and voltage, allowing for simultaneous digital coarse tuning and analog fine tuning to maintain frequency stability across temperature changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional PLL uses fixed tuning digital values and voltage for varactors, then the circuit structure is simple, but the output frequency drifts due to temperature variations

Engineering Contradiction:
Improveoutput frequency stabilityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent pre-calculates and stores compensation values in a lookup table before operation. The lookup table contains pre-determined adjustment values for tuning digital values and varactor voltages at different temperature points. During operation, the system simply retrieves the appropriate compensation values from the table based on measured temperature, avoiding complex real-time calculations and maintaining simple circuit structure while achieving temperature compensation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a temperature sensor and lookup table as intermediary components between the temperature variation and the VCO tuning mechanism. The temperature sensor measures the actual temperature, the lookup table translates this measurement into appropriate compensation values, and these values are then applied to adjust the tuning digital values and varactor voltages. This intermediary approach decouples the direct relationship between temperature and frequency drift, enabling stable operation

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If PLL uses multiple capacitors for coarse tuning and fine tuning, then the frequency control precision is improved, but the device complexity increases

Engineering Contradiction:
Improvefrequency control precisionVSAvoidnumber of capacitors
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the frequency tuning function into two distinct segments: coarse tuning and fine tuning. Multiple capacitors are assigned to coarse tuning to provide broad frequency range coverage, while a separate varactor capacitor handles fine tuning for precise frequency adjustment. This segmentation allows each capacitor group to be optimized for its specific function, achieving high overall precision without requiring an excessive number of capacitors for both functions simultaneously

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs dynamic switching between different capacitor configurations based on the required tuning range. The coarse tuning capacitors are switched in discrete steps to cover the broad frequency range, while the fine tuning varactor provides continuous adjustment within each coarse step. This dynamic approach enables the system to achieve high precision across the entire frequency range by combining the advantages of both discrete and continuous tuning mechanisms

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7952435B2Phase locked loop and method for compensating temperature thereof
Publication Date: 2011.05.31 GCT SEMICONDUCTOR INC
  • US7952435B2 patent drawing
  • US7952435B2 patent drawing
  • US7952435B2 patent drawing

AI summary

Embodiments of a phase lock loop and a method for compensating a temperature thereof can output an initial tuning digital value for a voltage controlled oscillator configured to output a desired phase lock loop frequency compensated according to a temperature change. Embodiments of a phase lock loop and a method for compensating a temperature thereof can simultaneously perform a digital coarse tuning and an analog fine tuning to compensate for a temperature in a limited time.