PLL Timing Control for Low-Power Data Segment Scheduling
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Solution Overview
Problem
In wireless networks used for sensing biometric signals, reducing power consumption in phase locked loop (PLL) components is challenging due to their high frequency operation, which affects the efficiency of data segment scheduling and communication in low power communication devices.
Innovation Solution
Implementing a PLL controller to manage hold time and lock time in low power communication devices, allowing for the scheduling of data segments based on controlled PLL operational settings shared between devices, thereby optimizing power usage by turning PLLs ON and OFF during specific times to reduce consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the PLL operates continuously to maintain stable frequency for communication, then frequency stability is improved, but power consumption increases
Solution Approach 1:
The patent applies periodic action by controlling the PLL to operate only during specific time intervals when data segments are transmitted or received. The PLL is turned OFF during idle periods and turned ON before scheduled communication events, creating a periodic operation pattern that reduces power consumption while maintaining frequency stability when needed.
Solution Approach 2:
The patent implements preliminary action by turning ON the PLL in advance before scheduled data transmission or reception events. The PLL controller activates the PLL early enough to allow frequency locking before actual communication begins, ensuring frequency stability is established beforehand while minimizing the duration the PLL remains active.
2Use of energy by moving object
If the PLL is turned OFF to reduce power consumption, then power consumption decreases, but frequency stability is lost
Solution Approach 1:
The system performs preliminary action by activating the PLL before scheduled communication events. The PLL controller turns ON the PLL early enough to allow frequency locking to occur before data transmission or reception begins, ensuring frequency stability is established in advance while keeping the PLL OFF during idle periods to save power.
Solution Approach 2:
The patent applies dynamics by making the PLL operational state variable rather than fixed. The PLL dynamically transitions between ON and OFF states based on scheduled communication events, with the PLL controller adjusting the timing of these transitions to ensure frequency stability is available when needed while minimizing power consumption during idle periods.
3Adaptability or versatility
If data segments are scheduled without considering PLL hold time and lock time, then scheduling flexibility is improved, but communication reliability deteriorates
Solution Approach 1:
The patent applies parameter changes by incorporating PLL hold time and lock time parameters into the data segment scheduling process. The scheduler uses these timing parameters to determine when to turn the PLL ON and OFF, ensuring that data transmission or reception only occurs when the PLL has achieved and maintained frequency lock, thereby guaranteeing communication reliability while maintaining scheduling flexibility.
Solution Approach 2:
The system implements feedback by using the PLL's lock status and timing information to adjust scheduling decisions. The PLL controller provides feedback about the PLL's operational state (locked/unlocked, hold time remaining) to the scheduler, which then adjusts data segment timing accordingly, ensuring reliable communication while maintaining scheduling adaptability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces power consumption by scheduling data segments during PLL hold times, ensuring efficient communication while maintaining stable operating frequencies, thus enhancing the operational efficiency of low power communication devices in biometric signal sensing networks.
Implementation Method 1
a phase locked loop (PLL) configured to generate an operating frequency for the communication unit
Data Source
AI summary
A device communicating with a node, includes a communication unit configured to transmit a transmitting data segment to the node, and receive a receiving data segment from the node. The device further includes a phase locked loop (PLL) configured to generate an operating frequency for the communication unit. The device further includes a PLL controller configured to control a hold time and a lock time, of the PLL, that are shared between the node and the device. The device further includes a scheduler configured to schedule the transmitting data segment and the receiving data segment based on the controlled hold time and lock time.