PLL Frequency Synthesizer Control for Transfer Function Stability
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Solution Overview
Problem
Existing PLL frequency synthesizers face challenges in maintaining a desired transfer function due to variations in resistor and capacitive element characteristics, leading to issues with cutoff frequency and peak gain, and require adjustments that can be affected by reference voltage variations and the use of frequency dividers.
Innovation Solution
A PLL frequency synthesizer with a detection unit to monitor the change rate of the control voltage and a control unit to adjust the charge and discharge current, characteristics of the loop filter, and voltage controlled oscillator, allowing for precise adjustment without relying on frequency dividers and minimizing the impact of component variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If resistor and capacitive element values are used as designed, then the transfer function should have the desired cutoff frequency and peak gain, but manufacturing variations cause the actual transfer function to deviate from the design specifications
Solution Approach 1:
The patent employs a feedback mechanism where the actual control voltage is monitored and compared with the expected value. Based on this comparison, the charge pump current is dynamically adjusted to compensate for deviations caused by component variations, ensuring the transfer function matches design specifications despite manufacturing tolerances
Solution Approach 2:
The patent changes the operating parameters of the charge pump based on detected deviations. By adjusting the charge pump current dynamically rather than using fixed component values, the system adapts to manufacturing variations and maintains the desired transfer function characteristics
2Adaptability or versatility
If a frequency divider is used to adjust the VCO characteristic, then the VCO frequency can be adjusted, but the oscillation signal frequency fluctuates and may require division ratios that cannot be realized
Solution Approach 1:
The patent removes the frequency divider from the feedback path. Instead of dividing the VCO output frequency for comparison, the system directly compares the VCO output with the reference signal and adjusts the charge pump current to maintain the desired relationship, eliminating frequency fluctuation issues and unrealizable division ratios
Solution Approach 2:
The patent changes the approach from adjusting frequency through division ratios to adjusting the charge pump current directly. This parameter change allows continuous frequency adjustment without the discrete steps and limitations of frequency dividers, improving both adaptability and stability
Data Source
AI summary
A PLL frequency synthesizer includes a voltage controlled oscillator that outputs an oscillation signal having a frequency corresponding to a control voltage value, a phase comparison unit that outputs a phase difference signal representing a phase difference between a feedback oscillation signal and a reference oscillation signal, a charge pump that outputs a charge and discharge current according to the phase difference, a loop filter that outputs the control voltage value, which is increased or decreased according to a charge and discharge amount of a capacitive element, to the voltage controlled oscillator, a detection unit that detects a change rate of the control voltage value, and a control unit that adjusts the charge and discharge current, a characteristic of the loop filter, or a characteristic of the voltage controlled oscillator based on a detection result of the detection unit.