PLL-Tuned On-Chip RF Filter for PVT-Stable Receiver Front Ends

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Solution Overview

Problem

Existing RFIC receivers require external RF filters due to performance limitations of on-chip filters, leading to increased area and cost, and existing tuning methods consume power and increase complexity.

Innovation Solution

An auto-tuned RF filter integrated onto a single integrated circuit (IC) that uses the PLL's tuning signal to adjust its frequency response, eliminating the need for additional tuning circuitry and reducing power and complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If external RF filters (SAW, BAW, or ceramic) are used to achieve high Q-factor and better performance, then filter performance is improved, but device area and complexity increase due to discrete components

Engineering Contradiction:
Improvefilter performanceVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the RF filter with the on-chip inductor to form an integrated LC filter structure. The filter capacitor is formed using the inductor's own structure, combining two discrete components (inductor and capacitor) into a single integrated element, thereby reducing device area while maintaining filter performance

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The on-chip inductor serves dual functions: as an RF component for signal processing and as part of the filter capacitor structure. This multi-functional design eliminates the need for separate external filter components, reducing both area and complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Stability of the object's composition

If traditional tuning circuitry is added to on-chip RF filters to compensate for PVT variations, then filter performance stability is improved, but power consumption and device complexity increase

Engineering Contradiction:
Improvefilter frequency responseVSAvoidtuning circuitry
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent implements self-tuning capability where the RF filter automatically compensates for PVT variations using inherent feedback mechanisms. The filter adjusts its own resonant frequency in response to process, voltage, and temperature changes without requiring external tuning circuitry, thereby maintaining stability while reducing complexity

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The integrated LC filter structure incorporates feedback mechanisms that automatically adjust the filter's resonant frequency in response to PVT variations. This feedback-based self-adjustment maintains frequency response stability without adding complex external tuning circuitry

Inventive Principle:
Principle #23Feedback

3Device complexity

If on-chip RF filters are used to reduce area and eliminate external components, then device area is reduced, but filter performance deteriorates due to lower Q-factor in silicon technology

Engineering Contradiction:
Improvedevice areaVSAvoidfilter performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent combines the inductor and capacitor into a single integrated LC filter structure where the capacitor is formed using the inductor's own structure. This merging achieves high Q-factor performance in silicon technology by eliminating parasitic effects associated with separate discrete components

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent uses composite material structures in the integrated LC filter, combining different semiconductor materials and fabrication techniques to achieve high Q-factor performance. The composite structure optimizes the electrical characteristics of both the inductor and capacitor portions

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS20120274427A1Auto-tuning system for an on-chip RF filter
Publication Date: 2012.11.01 QUALCOMM INC
  • US20120274427A1 patent drawing
  • US20120274427A1 patent drawing
  • US20120274427A1 patent drawing

AI summary

A Radio Frequency Receiver on a Single Integrated Circuit (“RFSIC”) is described. The RFSIC may include a mixer, a phase-locked loop (“PLL”) in signal communication with the mixer, and an on-chip auto-tuned RF filter in signal communication with both the mixer and PPL, such that the same PLL simultaneously tunes the frequency of the VCO and the frequency response of the auto-tuned RF filter.