PLL Initialization Using Preprogrammed VCO Frequency
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Solution Overview
Problem
Phase locked loops (PLLs) require significant time to 'acquire lock' upon reset or frequency changes, leading to system delays and instability in interconnected systems, particularly in high-speed applications where precise timing is critical.
Innovation Solution
A method for quickly initializing PLLs by programming a target frequency using a programmable register to set an initial ballpark frequency, followed by fine adjustments, allowing rapid lock acquisition and reducing the lock time by orders of magnitude.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional PLL initialization is used, then the PLL will eventually acquire lock, but the lock time is excessively long causing system delays
Solution Approach 1:
The patent applies preliminary action by pre-programming the VCO with an initial frequency value before the PLL initialization process begins. This preliminary frequency setting allows the VCO to start close to the target frequency, dramatically reducing the time required for the PLL to acquire lock compared to traditional methods that start from an unknown or default frequency state
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting the VCO frequency parameter through programmed initial values. By changing the frequency parameter from a default state to a pre-calculated initial value that is close to the target frequency, the system accelerates the lock acquisition process while maintaining reliable locking
2Adaptability or versatility
If multiple PLLs are interconnected in layers, then clock distribution is achieved, but the serialized locking process extends system initialization time
Solution Approach 1:
The patent applies preliminary action to multi-PLL systems by pre-programming each PLL in the chain with its target frequency before initialization. This allows each PLL to start its locking process simultaneously from a known good frequency rather than sequentially waiting for upstream PLLs to lock first, dramatically reducing overall system initialization time
Solution Approach 2:
The patent applies segmentation by treating each PLL in the interconnected chain as an independent unit that can be individually pre-programmed and initialized. This segmentation allows parallel initialization of multiple PLLs rather than requiring serialized locking, where each PLL would wait for the previous one to lock before starting its own locking process
3Adaptability or versatility
If PLL undergoes rapid frequency changes, then frequency adaptability is improved, but lock acquisition time increases
Solution Approach 1:
The patent applies parameter changes by pre-calculating and storing initial frequency values that are close to expected target frequencies. When a frequency change is required, the system programs the VCO with the appropriate initial value from storage, allowing rapid transition to the new frequency range and reducing lock acquisition time after frequency changes
Solution Approach 2:
The patent applies preliminary action for frequency changes by pre-programming the VCO with initial frequency values that anticipate the target frequency. This preliminary setting of the frequency parameter allows the PLL to quickly adapt to frequency changes without requiring a lengthy search and lock process
Data Source
AI summary
A method and apparatus for fast PLL initialization have been disclosed where control of a VCO is based on a selected control signal which is based upon either a comparison signal or a prespecified signal.