Two-Point PLL VCO Gain Calibration Using Overflow Counter LUT
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Solution Overview
Problem
Existing two-point modulation PLLs face challenges in gain calibration, requiring large and power-consuming circuits for precision, and suffer from signal distortion due to VCO gain variations caused by PVT conditions, necessitating a low-power, low-area calibration solution that does not rely on analog comparators or multipliers/dividers.
Innovation Solution
An open-loop calibration system using an overflow counter and a Look-Up Table (LUT) to adjust the VCO gain, where the overflow counter counts pulses of the VCO output, and the difference is used to generate a digital value for gain control, eliminating the need for multipliers and dividers, and allowing for faster calibration without precision analog components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If large VCO gain is used to operate over wide frequency range, then frequency tuning range is improved, but chip area and power consumption increase
Solution Approach 1:
The frequency tuning range is divided into multiple discrete frequency steps, each corresponding to a specific divider value. This segmentation allows the VCO to achieve wide frequency coverage through digital control of the divider rather than requiring continuous analog tuning, reducing the need for large analog tuning circuits.
Solution Approach 2:
The divider value is made dynamically adjustable through digital control signals that modify the division ratio in real-time. This dynamic reconfiguration of the frequency division ratio enables the system to adapt to different frequency requirements without changing the physical VCO characteristics, thereby reducing chip area.
2Adaptability or versatility
If large VCO gain is used to operate over wide frequency range, then frequency tuning range is improved, but power consumption increases
Solution Approach 1:
The frequency tuning function is segmented into discrete steps controlled by digital divider values. This allows the system to achieve wide frequency range through digital division ratios rather than requiring high analog VCO gain, thereby reducing power consumption while maintaining frequency adaptability.
Solution Approach 2:
The analog VCO gain control mechanism is replaced with a digital frequency division mechanism. Instead of using large analog gain to achieve frequency range, the system uses digital divider reconfiguration, which consumes significantly less power while providing the same frequency tuning capability.
3Measurement precision
If traditional calibration circuits (analog comparators, multipliers/dividers) are used for gain calibration, then measurement precision is improved, but device complexity and power consumption increase
Solution Approach 1:
Traditional analog calibration circuits (comparators, multipliers, dividers) are replaced with a digital calibration approach using an overflow counter and look-up table. The overflow counter digitally measures frequency deviations, and the LUT digitally stores and applies correction values, eliminating complex analog components while maintaining calibration precision.
Solution Approach 2:
Instead of using complex analog circuits to measure and correct gain errors, the system creates a digital copy of the frequency measurement through the overflow counter. This digital representation is then used to index into a look-up table that contains pre-calculated correction values, simplifying the calibration circuitry while maintaining accuracy.
4Measurement precision
If traditional calibration circuits (analog comparators, multipliers/dividers) are used for gain calibration, then measurement precision is improved, but power consumption increases
Solution Approach 1:
Power-consuming analog calibration components (comparators, multipliers, dividers) are replaced with low-power digital components. The overflow counter uses simple digital counting logic, and the look-up table uses memory read operations, both of which consume significantly less power than their analog equivalents while maintaining calibration precision.
Solution Approach 2:
The calibration system uses simple, low-cost digital counting and memory lookup operations instead of expensive, power-hungry analog circuits. The overflow counter performs a straightforward count function, and the LUT provides direct address access to correction values, creating a low-power calibration solution that achieves the required precision.
Data Source
AI summary
A two-point modulation Phase-Locked Loop (PLL) has a gain-adjustable voltage-controlled oscillator (VCO). A digital data modulation signal is combined with a carrier and input to a feedback divider. The data modulation signal is also input to a Digital-to-Analog Converter (DAC) to generate an analog voltage to a second input of the VCO. A calibration unit divides the VCO output and counts pulses. During calibration, the data modulation signal is set to minimum and then maximum values and VCO output pulses counted. A count difference for the data modulation signal at maximum and minimum values is input to a Look-Up Table (LUT) to read out a gain calibration value. During normal operation mode, the gain calibration value from the LUT is applied to a second input of the DAC, which drives the VCO to adjust VCO gain. A switch before the VCO opens the loop for faster open-loop calibration.


