PLL Coarse-Fine VCO Control for Reduced Gain and Noise

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Solution Overview

Problem

Existing phase locked loop (PLL) circuits with ring type voltage controlled oscillators (VCOs) face challenges in reducing VCO gain due to high noise from resistors, and current methods only achieve limited gain reduction, which is insufficient for applications requiring further reduction, especially in low voltage scenarios.

Innovation Solution

The PLL design incorporates a phase frequency detector, charge pump, loop filter, and coarse control circuit that integrates differences between intermediate and reference voltages to generate fine and coarse control signals for the VCO, allowing for increased gain reduction by centering the fine control range and reducing transconductance differences across voltage to current conversion, thereby enabling more significant VCO gain reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a ring type VCO is used in a PLL, then the PLL can generate output signals with phase related to input signals, but the VCO gain becomes high leading to high noise from resistors in filter elements

Engineering Contradiction:
Improvephase locking capabilityVSAvoidnoise from resistors
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The control signal generation is segmented into two independent paths: a fine control path using a charge pump and loop filter, and a coarse control path using a coarse control circuit that generates control signals centered about the fine control range. This segmentation allows the VCO to operate with reduced gain while maintaining phase locking capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention changes the operating parameters of the VCO by introducing a coarse control signal that adjusts the VCO's gain parameter. The coarse control circuit modifies the VCO's transconductance to reduce its gain, thereby reducing the noise contribution from filter resistors while maintaining adequate phase control range.

Inventive Principle:
Principle #35Parameter changes

2Object-generated harmful factors

If bias current is used to reduce VCO gain, then noise is reduced, but the gain reduction is limited to about one half due to temperature and aging compensation requirements

Engineering Contradiction:
Improvenoise from resistorsVSAvoidgain reduction range
Core Design Contradiction:
Object-generated harmful factorsVSAdaptability or versatility

Solution Approach 1:

The coarse control circuit dynamically adjusts the VCO gain based on operating conditions, allowing the gain to be reduced by a factor of five or more. The control signals are continuously adapted to maintain optimal operation across temperature and aging variations, providing both high gain reduction and environmental adaptability.

Inventive Principle:
Principle #15Dynamics

3Object-generated harmful factors

If coarse control is added to reduce VCO gain further, then gain reduction increases, but the circuit complexity increases

Engineering Contradiction:
Improvenoise from resistorsVSAvoidcontrol circuit complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The coarse control circuit is merged with the existing fine control path, where the coarse control signals are generated based on the same phase comparison information. This integration allows the additional functionality to be added with minimal increase in overall circuit complexity.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively reduces VCO gain, minimizes noise from resistors, maintains high current output, and allows for lower supply voltages, enhancing the PLL's performance and simplifying the charge pump design.

Implementation Method 1

a coarse control circuit that integrates differences between intermediate and reference voltages to generate fine and coarse control signals for the VCO

Methodology Applied
Scientific EffectVoltage integration: Capacitance

Data Source

PatentUS10911053B2Phase locked loop design with reduced VCO gain
Publication Date: 2021.02.02 STMICROELECTRONICS INT NV
  • US10911053B2 patent drawing
  • US10911053B2 patent drawing
  • US10911053B2 patent drawing

AI summary

A PLL includes a phase frequency detector (PFD) receiving an input signal and feedback signal, and producing a control signal. A charge pump receives the control signal and produces an initial VCO control. A loop filter generates a fine VCO control and intermediate output based upon the initial VCO control. A coarse control circuit includes an integrator having a first input receiving the intermediate output, a second input, and generating a coarse VCO control, a first switch coupling a reference voltage to the second input, a buffer buffering output of the integrator, and a second switch coupling output of the integrator to the second input of the integrator. A VCO receives the fine VCO control and the coarse VCO control, and generates an output signal having a frequency based thereupon. A feedback path receives the output signal and produces the feedback signal.