PLL Supply Voltage Tracking for Frequency-Scaled Power
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Solution Overview
Problem
Traditional phase-locked loop (PLL) architectures consume excessive power due to fixed supply voltage that does not adjust with frequency, leading to increased power consumption, especially in low power and ultra-low power applications.
Innovation Solution
A PLL architecture with an adjustable supply voltage, enabled by a digital voltage tracking unit and voltage regulator, which scales power consumption with operating frequency by adjusting the supply voltage based on digital input supply voltage or feedback ratio, eliminating the need for a post PLL divider and supporting a wide frequency range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed voltage supply is used in traditional PLL architecture, then the PLL circuit can operate stably, but power consumption increases excessively
Solution Approach 1:
The patent applies dynamics by transitioning from a fixed voltage supply to a dynamic voltage supply that adjusts according to operating frequency. The voltage regulator modifies the supply voltage to the PLL circuit based on frequency requirements, enabling the system to adapt its power consumption to actual operational needs while maintaining stability across different frequency ranges.
Solution Approach 2:
The patent implements parameter changes by varying the supply voltage parameter dynamically. Instead of maintaining a constant voltage, the system changes the voltage parameter in response to frequency adjustments, allowing the PLL to operate efficiently at different power levels while preserving operational reliability through controlled parameter adaptation.
2Device complexity
If fixed voltage supply is used, then circuit design is simplified, but power consumption does not scale with frequency
Solution Approach 1:
The introduction of a dynamic voltage regulator adds controlled complexity to enable frequency-dependent power scaling. The regulator dynamically adjusts voltage based on frequency demands, transforming the static circuit into an adaptive system that optimizes power consumption while maintaining manageable design complexity through systematic control mechanisms.
Solution Approach 2:
The voltage regulator serves multiple functions: it supplies voltage to the PLL circuit, adjusts voltage according to frequency requirements, and enables power scaling across different operating modes. This multi-functionality consolidates what could be separate complex subsystems into a single integrated component, managing overall device complexity while achieving energy efficiency.
3Ease of manufacture
If traditional PLL architecture is used, then implementation is straightforward, but additional dividers are required for wide frequency range
Solution Approach 1:
The patent extracts and removes the post-PLL divider component from the traditional architecture. By eliminating this separate divider stage, the system achieves wide frequency range coverage through voltage-controlled frequency adjustment alone, simplifying the overall implementation while reducing the number of required components.
Solution Approach 2:
The PLL circuit is enhanced to perform multiple functions: it generates the output frequency and simultaneously provides wide frequency range coverage through voltage-controlled tuning. This multi-functionality eliminates the need for separate divider stages, making the implementation more straightforward while reducing device complexity.
4Power
If fixed voltage is applied, then power consumption is constant, but efficiency decreases in low power applications
Solution Approach 1:
The system transitions from constant power output to dynamic power adjustment. The voltage regulator modifies the supply voltage according to frequency demands, enabling the PLL to consume only the necessary power for each operating condition. This dynamic adaptation significantly improves operational efficiency in low-power applications while maintaining constant power capability when required.
Solution Approach 2:
The patent applies parameter changes by varying the supply voltage parameter to match operational requirements. In low-frequency or low-power modes, the voltage is reduced to minimize power consumption, while in high-performance modes, full voltage is applied. This adaptive parameter adjustment optimizes productivity and efficiency across different operating scenarios.
Data Source
AI summary
Apparatuses, systems, and a method for providing a PLL architecture with scalable power are described. In one embodiment, a system includes one or more processing units having a voltage regulator to generate a controllably adjustable supply voltage for a phase-locked loop (PLL) circuit coupled to the voltage regulator. The PLL circuit compares a phase and frequency of the reference clock signal to a phase and frequency of a generated feedback clock signal and generates an output signal based on the comparison. A tracking unit adjusts the controllably adjustable supply voltage based on an operating frequency of the system.