PLL-Less mmWave Power Head Using Pilot-Derived LO Clocks

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Solution Overview

Problem

Conventional 5G-NR mmWave communication systems face issues with spur and coupling problems due to the colocation of PLL frequency synthesizers with antenna front end modules, leading to reduced reliability and increased processing complexity.

Innovation Solution

A PLL-less mmWave power head that separates and multiplies a pilot signal to generate local oscillator clock signals at harmonic frequencies, eliminating the need for a PLL frequency synthesizer and enabling up and down conversions between intermediate and mmWave carrier frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a PLL frequency synthesizer is collocated with an antenna front end module, then frequency conversion functionality is provided, but spur and coupling issues occur leading to reduced reliability

Engineering Contradiction:
Improvereliability of mmWave power headVSAvoidspur and coupling issues
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the harmful PLL frequency synthesizer from the mmWave power head, separating it into a different device. This removal eliminates the source of spur and coupling issues while preserving the essential frequency conversion functionality through alternative means (using a reference signal from the communication signal itself).

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the frequency conversion function from the frequency generation function. Instead of using a traditional PLL synthesizer that generates local oscillator signals independently, the system uses a mixer to combine the communication signal with a reference signal, separating the harmful PLL component from the useful frequency conversion operation.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If a PLL frequency synthesizer is used for frequency conversion, then up and down conversions between IF and mmWave carrier frequencies are enabled, but processing complexity increases

Engineering Contradiction:
Improveprocessing simplicityVSAvoidprocessing complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent removes the complex PLL frequency synthesizer processing from the system, replacing it with a simpler reference signal approach. This extraction of the harmful complex component directly reduces processing complexity while maintaining the essential frequency conversion capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of generating a complex local oscillator signal through PLL synthesis, the system uses a simplified reference signal that is multiplied with the communication signal. This copying approach uses a simpler signal structure to achieve the same frequency conversion function, reducing processing complexity.

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution improves the reliability and performance of mmWave power heads by reducing spur and coupling issues, simplifying processing, and enhancing the efficiency of mmWave communication systems.

Implementation Method 1

multiplies the pilot signal to generate a local oscillator (LO) clock signal at a harmonic frequency relative to the base frequency of the pilot signal

Methodology Applied
Scientific EffectFrequency multiplication:

Implementation Method 2

A selected LO clock signal is provided to a mixer circuit for up and down conversions between the IF frequency and the mmWave carrier frequency

Methodology Applied
Scientific EffectMixing:

Data Source

PatentUS10374788B2Phase locked loop (PLL)-less millimeter wave power head
Publication Date: 2019.08.06 QORVO US INC
  • US10374788B2 patent drawing
  • US10374788B2 patent drawing
  • US10374788B2 patent drawing

AI summary

Embodiments of the disclosure relate to a phase locked loop (PLL)-less millimeter wave (mmWave) power head. The mmWave power head receives a multiplexed signal including a pilot signal at a base frequency and a communication signal at the IF frequency. The mmWave power head separates the pilot signal from the communication signal and multiplies the pilot signal to generate a local oscillator (LO) clock signal(s) at a harmonic frequency(ies) relative to the base frequency of the pilot signal. A selected LO clock signal is provided to a mixer circuit(s) for up and down conversions between the IF frequency and the mmWave carrier frequency. By eliminating the PLL frequency synthesizer from the mmWave power head, it is possible to avoid spur and coupling issues associated with collocating the PLL frequency synthesizer with an antenna front end module (FEM), thus helping to improve reliability and performance of the mmWave power head.